2008 Microchip Technology Inc.
DS39626E-page 17
PIC18F2525/2620/4525/4620
PORTA is a bidirectional I/O port.
RA0/AN0
RA0
AN0
219
19
I/O
I
TTL
Analog
Digital I/O.
Analog input 0.
RA1/AN1
RA1
AN1
320
20
I/O
I
TTL
Analog
Digital I/O.
Analog input 1.
RA2/AN2/VREF-/CVREF
RA2
AN2
VREF-
CVREF
421
21
I/O
I
O
TTL
Analog
Digital I/O.
Analog input 2.
A/D reference voltage (low) input.
Comparator reference voltage output.
RA3/AN3/VREF+
RA3
AN3
VREF+
522
22
I/O
I
TTL
Analog
Digital I/O.
Analog input 3.
A/D reference voltage (high) input.
RA4/T0CKI/C1OUT
RA4
T0CKI
C1OUT
623
23
I/O
I
O
ST
—
Digital I/O.
Timer0 external clock input.
Comparator 1 output.
RA5/AN4/SS/HLVDIN/
C2OUT
RA5
AN4
SS
HLVDIN
C2OUT
724
24
I/O
I
O
TTL
Analog
TTL
Analog
—
Digital I/O.
Analog input 4.
SPI slave select input.
High/Low-Voltage Detect input.
Comparator 2 output.
RA6
See the OSC2/CLKO/RA6 pin.
RA7
See the OSC1/CLKI/RA7 pin.
TABLE 1-3:
PIC18F4525/4620 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
PDIP
QFN
TQFP
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
I
= Input
O
= Output
P
= Power
Note 1:
Default assignment for CCP2 when the CCP2MX Configuration bit is set.
2:
Alternate assignment for CCP2 when the CCP2MX Configuration bit is cleared.
3:
For the QFN package, it is recommended that the bottom pad be connected to VSS.