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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | PIC18F44K22-I/P |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 18/71闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC PIC MCU 16KB FLASH 40PDIP |
| 鐢�(ch菐n)鍝佸煿瑷撴ā濉婏細 | 8-bit PIC® Microcontroller Portfolio |
| 妯欐簴鍖呰锛� | 10 |
| 绯诲垪锛� | PIC® XLP™ 18F |
| 鏍稿績铏曠悊鍣細 | PIC |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 64MHz |
| 閫ｉ€氭€э細 | I²C锛孲PI锛孶ART/USART |
| 澶栧湇瑷倷锛� | 娆犲妾㈡脯/寰╀綅锛孒LVD锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 35 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 16KB锛�8K x 16锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| EEPROM 澶у皬锛� | 256 x 8 |
| RAM 瀹归噺锛� | 768 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.8 V ~ 5.5 V |
| 鏁�(sh霉)鎿�(j霉)杞夋彌鍣細 | A/D 30x10b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 40-DIP锛�0.600"锛�15.24mm锛� |
| 鍖呰锛� | 绠′欢 |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�鐣跺墠绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�绗�25闋�绗�26闋�绗�27闋�绗�28闋�绗�29闋�绗�30闋�绗�31闋�绗�32闋�绗�33闋�绗�34闋�绗�35闋�绗�36闋�绗�37闋�绗�38闋�绗�39闋�绗�40闋�绗�41闋�绗�42闋�绗�43闋�绗�44闋�绗�45闋�绗�46闋�绗�47闋�绗�48闋�绗�49闋�绗�50闋�绗�51闋�绗�52闋�绗�53闋�绗�54闋�绗�55闋�绗�56闋�绗�57闋�绗�58闋�绗�59闋�绗�60闋�绗�61闋�绗�62闋�绗�63闋�绗�64闋�绗�65闋�绗�66闋�绗�67闋�绗�68闋�绗�69闋�绗�70闋�绗�71闋�
2010-2012 Microchip Technology Inc.
DS41412F-page 25
PIC18(L)F2X/4XK22
21
40
36
RD2/P2B/AN22
RD2
I/O
ST
Digital I/O
P2B(1)
O
CMOS
Enhanced CCP2 PWM output.
AN22
I
Analog Analog input 22.
22
41
37
RD3/P2C/SS2/AN23
RD3
I/O
ST
Digital I/O.
P2C
O
CMOS
Enhanced CCP2 PWM output.
SS2
I
TTL
SPI slave select input (MSSP).
AN23
I
Analog Analog input 23.
27
2
RD4/P2D/SDO2/AN24
RD4
I/O
ST
Digital I/O.
P2D
O
CMOS
Enhanced CCP2 PWM output.
SDO2
O
鈥�
SPI data out (MSSP).
AN24
I
Analog Analog input 24.
28
3
RD5/P1B/AN25
RD5
I/O
ST
Digital I/O.
P1B
O
CMOS
Enhanced CCP1 PWM output.
AN25
I
Analog Analog input 25.
29
4
RD6/P1C/TX2/CK2/AN26
RD6
I/O
ST
Digital I/O.
P1C
O
CMOS
Enhanced CCP1 PWM output.
TX2
O
鈥�
EUSART asynchronous transmit.
CK2
I/O
ST
EUSART synchronous clock (see related RXx/
DTx).
AN26
I
Analog Analog input 26.
30
5
RD7/P1D/RX2/DT2/AN27
RD7
I/O
ST
Digital I/O.
P1D
O
CMOS
Enhanced CCP1 PWM output.
RX2
I
ST
EUSART asynchronous receive.
DT2
I/O
ST
EUSART synchronous data (see related TXx/
CKx).
AN27
I
Analog Analog input 27.
825
25
23
RE0/P3A/CCP3/AN5
RE0
I/O
ST
Digital I/O.
P3A(2)
O
CMOS
Enhanced CCP3 PWM output.
CCP3(2)
I/O
ST
Capture 3 input/Compare 3 output/PWM 3 output.
AN5
I
Analog Analog input 5.
926
26
24
RE1/P3B/AN6
RE1
I/O
ST
Digital I/O.
P3B
O
CMOS
Enhanced CCP3 PWM output.
AN6
I
Analog Analog input 6.
TABLE 1-3:
PIC18(L)F4XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
Pin
Type
Buffer
Type
Description
PDIP
TQFP
QFN
UQFN
Legend:
TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;
I = Input; O = Output; P = Power.
Note
1:
Default pin assignment for P2B, T3CKI, CCP3/P3A and CCP2/P2A when Configuration bits PB2MX, T3CMX, CCP3MX
and CCP2MX are set.
2:
Alternate pin assignment for P2B, T3CKI, CCP3/P3A and CCP2/P2A when Configuration bits PB2MX, T3CMX,
CCP3MX and CCP2MX are clear.
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鐩搁棞浠ｇ悊鍟�/鎶€琛撳弮鏁�(sh霉) |
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