PIC18F2XK20/4XK20
DS41297F-page 32
Advance Information
2009 Microchip Technology Inc.
CP3
CONFIG5L
Code Protection bits (Block 3 code memory area)
1
= Block 3 is not code-protected
0
= Block 3 is code-protected
CP2
CONFIG5L
Code Protection bits (Block 2 code memory area)
1
= Block 2 is not code-protected
0
= Block 2 is code-protected
CP1
CONFIG5L
Code Protection bits (Block 1 code memory area)
1
= Block 1 is not code-protected
0
= Block 1 is code-protected
CP0
CONFIG5L
Code Protection bits (Block 0 code memory area)
1
= Block 0 is not code-protected
0
= Block 0 is code-protected
CPD
CONFIG5H
Code Protection bits (Data EEPROM)
1
= Data EEPROM is not code-protected
0
= Data EEPROM is code-protected
CPB
CONFIG5H
Code Protection bits (Boot Block memory area)
1
= Boot Block is not code-protected
0
= Boot Block is code-protected
WRT3
CONFIG6L
Write Protection bits (Block 3 code memory area)
1
= Block 3 is not write-protected
0
= Block 3 is write-protected
WRT2
CONFIG6L
Write Protection bits (Block 2 code memory area)
1
= Block 2 is not write-protected
0
= Block 2 is write-protected
WRT1
CONFIG6L
Write Protection bits (Block 1 code memory area)
1
= Block 1 is not write-protected
0
= Block 1 is write-protected
WRT0
CONFIG6L
Write Protection bits (Block 0 code memory area)
1
= Block 0 is not write-protected
0
= Block 0 is write-protected
WRTD
CONFIG6H
Write Protection bit (Data EEPROM)
1
= Data EEPROM is not write-protected
0
= Data EEPROM is write-protected
WRTB
CONFIG6H
Write Protection bit (Boot Block memory area)
1
= Boot Block is not write-protected
0
= Boot Block is write-protected
WRTC
CONFIG6H
Write Protection bit (Configuration registers)
1
= Configuration registers are not write-protected
0
= Configuration registers are write-protected
TABLE 5-3:
PIC18F2XK20/4XK20 BIT DESCRIPTIONS (CONTINUED)
Bit Name
Configuration
Words
Description
.
