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參數(shù)資料
| 型號： | PIC18F448T-I/L |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 72/116頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU FLASH 8KX16 W/CAN 44-PLCC |
| 產(chǎn)品培訓模塊： | Asynchronous Stimulus |
| 標準包裝： | 500 |
| 系列： | PIC® 18F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 40MHz |
| 連通性： | CAN，I²C，SPI，UART/USART |
| 外圍設備： | 欠壓檢測/復位，LVD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 33 |
| 程序存儲器容量： | 16KB（8K x 16） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 256 x 8 |
| RAM 容量： | 768 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.2 V ~ 5.5 V |
| 數(shù)據(jù)轉換器： | A/D 8x10b |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 包裝： | 帶卷 (TR) |
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2006 Microchip Technology Inc.
DS41159E-page 57
PIC18FXX8
4.13
Status Register
The Status register, shown in Register 4-2, contains the
arithmetic status of the ALU. The Status register can be
the destination for any instruction, as with any other
register. If the Status register is the destination for an
instruction that affects the Z, DC, C, OV or N bits, then
the write to these five bits is disabled. These bits are set
or cleared according to the device logic. Therefore, the
result of an instruction with the Status register as
destination may be different than intended.
For example, CLRF STATUS will clear the upper three
bits and set the Z bit. This leaves the Status register as
000u u1uu
(where u = unchanged).
It is recommended, therefore, that only BCF, BSF,
SWAPF,
MOVFF
and MOVWF instructions are used to
alter the Status register, because these instructions do
not affect the Z, C, DC, OV or N bits from the Status
register. For other instructions which do not affect the
status bits, see Table 25-2.
REGISTER 4-2:
STATUS REGISTER
Note:
The C and DC bits operate as a Borrow
and Digit
Borrow bit respectively, in
subtraction.
U-0
R/W-x
—
—N
OV
Z
DC
C
bit 7
bit 0
bit 7-5
Unimplemented: Read as ‘0’
bit 4
N: Negative bit
This bit is used for signed arithmetic (2’s complement). It indicates whether the result of the ALU
operation was negative (ALU MSb = 1).
1
= Result was negative
0
= Result was positive
bit 3
OV: Overflow bit
This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the 7-bit
magnitude which causes the sign bit (bit 7) to change state.
1
= Overflow occurred for signed arithmetic (in this arithmetic operation)
0
= No overflow occurred
bit 2
Z: Zero bit
1
= The result of an arithmetic or logic operation is zero
0
= The result of an arithmetic or logic operation is not zero
bit 1
DC: Digit Carry/Borrow bit
For ADDWF, ADDLW, SUBLW and SUBWF instructions:
1
= A carry-out from the 4th low-order bit of the result occurred
0
= No carry-out from the 4th low-order bit of the result
Note:
For Borrow, the polarity is reversed. A subtraction is executed by adding the 2’s
complement of the second operand. For rotate (RRCF, RRNCF, RLCF and RLNCF)
instructions, this bit is loaded with either bit 4 or bit 3 of the source register.
bit 0
C: Carry/Borrow bit
For ADDWF, ADDLW, SUBLW and SUBWF instructions:
1
= A carry-out from the Most Significant bit of the result occurred
0
= No carry-out from the Most Significant bit of the result occurred
Note:
For Borrow, the polarity is reversed. A subtraction is executed by adding the 2’s
complement of the second operand. For rotate (RRF, RLF) instructions, this bit is
loaded with either the high or low-order bit of the source register.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
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