2002 Microchip Technology Inc.
Preliminary
DS30485A-page 265
PIC18FXX39
VOL
Output Low Voltage
D080
I/O ports
鈥�
0.6
V
IOL = 8.5 mA, VDD = 4.5V,
-40
掳C to +85掳C
D080A
鈥�
0.6
V
IOL = 7.0 mA, VDD = 4.5V,
-40
掳C to +125掳C
VOH
Output High Voltage(2)
D090
I/O ports
VDD 鈥� 0.7
鈥�
V
IOH = -3.0 mA, VDD = 4.5V,
-40
掳C to +85掳C
D090A
VDD 鈥� 0.7
鈥�
V
IOH = -2.5 mA, VDD = 4.5V,
-40
掳C to +125掳C
D150
VOD
Open Drain High Voltage
鈥�
8.5
V
RA4 pin
Capacitive Loading Specs
on Output Pins
D100(3) COSC2
OSC2 pin
鈥�
15
pF
In HS mode when external
clock is used to drive OSC1
D101
CIO
All I/O pins
鈥�
50
pF
To meet the AC Timing
Specifications
D102
CB
SCL, SDA
鈥�
400
pF
In I2C mode
23.2
DC Characteristics: PIC18FXX39 (Industrial, Extended)
PIC18LFXX39 (Industrial) (Continued)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40掳C
鈮� TA 鈮� +85掳C for industrial
-40掳C
鈮� TA 鈮� +125掳C for extended
Param
No.
Symbol
Characteristic
Min
Max
Units
Conditions
Note 1: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified
levels represent normal operating conditions. Higher leakage current may be measured at different input
voltages.
2: Negative current is defined as current sourced by the pin.
3: Parameter is characterized but not tested.