
Micrel, Inc.
KSZ8864RMN
April 2012
31
M9999-043012-1.5
Switch MAC3/MAC4 SW3/SW4-RMII Interface
The Reduced Media Independent Interface (RMII) specifies a low pin count Media Independent Interface (MII). The
KSZ8864RMN supports RMII interface at Port 3 and port 4 switch sides and provides a common interface at MAC3 and
MAC4 layer in the device, and has the following key characteristics:
Supports 10Mbps and 100Mbps data rates.
Uses a single 50 MHz clock reference (provided internally or externally): in internal mode, the chip provides reference
clock from SMxRXC pin to SMxTXC/SMxREFCLK pin and the reference clock-in pin of the opposite RMII; in external
mode, the chip receives 50MHz reference clock from an external oscillator or opposite RMII interface to
SW4TXC/SM4REFCLK pin only.
Provides independent 2-bit wide (bi-bit) transmit and receive data paths.
Table 4 shows two types of RMII connections of MAC to MAC and MAC to PHY,
The first is an external MAC connects to SW3/4-RMII with ‘PHY mode’.
The second is an external PHY connects to SW3/4-RMII with ‘MAC mode’.
When the strap pin P1LED0 is pulled down, the switch MAC4 is SW4-RMII mode after power up reset or warm reset.
When the strap pin P2LED0 is pulled down, the switch MAC3 is SW3-RMII mode after power up reset or warm reset.