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| 鍨嬭櫉锛� | PIC18F2620-I/SP |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 59/286闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC MCU FLASH 32KX16 28-DIP |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Asynchronous Stimulus 8-bit PIC® Microcontroller Portfolio |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 15 |
| 绯诲垪锛� | PIC® 18F |
| 鏍稿績铏曠悊鍣細 | PIC |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 40MHz |
| 閫ｉ€氭€э細 | I²C锛孲PI锛孶ART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | 娆犲妾㈡脯/寰�(f霉)浣�锛孒LVD锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 25 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 64KB锛�32K x 16锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| EEPROM 澶�?銆�?/td> | 1K x 8 |
| RAM 瀹归噺锛� | 3.8K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 4.2 V ~ 5.5 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 10x10b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 28-DIP锛�0.300"锛�7.62mm锛� |
| 鍖呰锛� | 绠′欢 |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 644 (CN2011-ZH PDF) |
| 閰嶇敤锛� | I3DB18F4620-ND - BOARD DAUGHTER ICEPIC3 DVA18XP280-ND - DEVICE ADAPTER 18F2220 PDIP 28LD |
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1996 Microchip Technology Inc.
DS30412C-page 151
PIC17C4X
Applicable Devices 42 R42 42A 43 R43 44
Output Low Voltage
D080
D081
VOL
I/O ports (except RA2 and RA3)
with TTL buffer
鈥�
0.1VDD
0.4
V
IOL = 4 mA
IOL = 6 mA, VDD = 4.5V
Note 6
D082
RA2 and RA3
鈥�
3.0
V
IOL = 60.0 mA, VDD = 5.5V
D083
OSC2/CLKOUT
(RC and EC osc modes)
鈥�
0.4
V
IOL = 2 mA, VDD = 4.5V
Output High Voltage (Note 3)
D090
D091
VOH
I/O ports (except RA2 and RA3)
with TTL buffer
0.9VDD
2.4
鈥�
V
IOH = -2 mA
IOH = -6.0 mA, VDD = 4.5V
Note 6
D092
RA2 and RA3
鈥�
12
V
Pulled-up to externally applied
voltage
D093
OSC2/CLKOUT
(RC and EC osc modes)
2.4
鈥�
V
IOH = -5 mA, VDD = 4.5V
Capacitive Loading Specs on
Output Pins
D100
COSC2 OSC2 pin
鈥�
25
pF
In EC or RC osc modes when
OSC2 pin is outputting
CLKOUT.
External clock is used to drive
OSC1.
D101
CIO
All I/O pins and OSC2
(in RC mode)
鈥�
50
pF
D102
CAD
System Interface Bus
(PORTC, PORTD and PORTE)
鈥�
100
pF
In Microprocessor or
Extended Microcontroller
mode
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40C
鈮� TA 鈮� +85C for industrial and
0C
鈮� TA 鈮� +70C for commercial
Operating voltage VDD range as described in Section 17.1
Parameter
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
*
These parameters are characterized but not tested.
Data in 鈥淭yp鈥� column is at 5V, 25
掳C unless otherwise stated. These parameters are for design guidance only
and are not tested.
These parameters are for design guidance only and are not tested, nor characterized.
Design guidance to attain the AC timing specications. These loads are not tested.
Note 1: In RC oscillator conguration, the OSC1 pin is a Schmitt Trigger input. It is not recommended that the
PIC17CXX devices be driven with external clock in RC mode.
2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specied levels
represent normal operating conditions. Higher leakage current may be measured at different input voltages.
3: Negative current is dened as coming out of the pin.
4: These specications are for the programming of the on-chip program memory EPROM through the use of the
table write instructions. The complete programming specications can be found in: PIC17CXX Programming
Specications (Literature number DS30139).
5: The MCLR/Vpp pin may be kept in this range at times other than programming, but this is not recommended.
6: For TTL buffers, the better of the two specications may be used.
鐩搁棞(gu膩n)PDF璩囨枡 |
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
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| PIC18F2620T-I/SO | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 64KB 3968 RAM 25 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC18F2680-E/SO | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 64KB 3328 RAM w/ECAN RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC18F2680-E/SP | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 64KB 3328 RAM w/ECAN RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC18F2680-H/SO | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 64 KB Flash 3328 RAM 25 I/O w/ECAN RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC18F2680-H/SP | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 64 KB Flash 3328 RAM 25 I/O w/ECAN RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
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