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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | PIC18F25K20T-I/SS |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 33/42闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC PIC MCU FLASH 16KX16 28SSOP |
| 鐢�(ch菐n)鍝佸煿瑷撴ā濉婏細 | PIC18 K-Series XLP Deep Sleep Mode 8-bit PIC® Microcontroller Portfolio |
| 妯欐簴鍖呰锛� | 1 |
| 绯诲垪锛� | PIC® XLP™ 18F |
| 鏍稿績铏曠悊鍣細 | PIC |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 64MHz |
| 閫ｉ€氭€э細 | I²C锛孲PI锛孶ART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | 娆犲妾㈡脯/寰╀綅锛孒LVD锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 24 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 32KB锛�16K x 16锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| EEPROM 澶�?銆�?/td> | 256 x 8 |
| RAM 瀹归噺锛� | 1.5K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.8 V ~ 3.6 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 11x10b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 28-SSOP锛�0.209"锛�5.30mm 瀵級 |
| 鍖呰锛� | 妯欐簴鍖呰 |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 656 (CN2011-ZH PDF) |
| 閰嶇敤锛� | AC164112-ND - VOLTAGE LIMITER MPLAB ICD2 VPP AC164307-ND - MODULE SKT FOR PM3 28SSOP |
| 鍏跺畠鍚嶇ū锛� | PIC18F25K20T-I/SSDKR |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�绗�25闋�绗�26闋�绗�27闋�绗�28闋�绗�29闋�绗�30闋�绗�31闋�绗�32闋�鐣跺墠绗�33闋�绗�34闋�绗�35闋�绗�36闋�绗�37闋�绗�38闋�绗�39闋�绗�40闋�绗�41闋�绗�42闋�
2009 Microchip Technology Inc.
Advance Information
DS41297F-page 39
PIC18F2XK20/4XK20
P12
THLD2
Input Data Hold Time from MCLR/VPP/RE3
鈫�
2鈥�
渭s
P13
TSET2VDD
鈫� Setup Time to MCLR/VPP/RE3 鈫�
100
鈥�
ns
P14
TVALID
Data Out Valid from PGC
鈫�
10
鈥�
ns
P15
TSET3PGM
鈫� Setup Time to MCLR/VPP/RE3 鈫�
2鈥�
渭s
P16
TDLY8
Delay between Last PGC
鈫� and MCLR/VPP/RE3 鈫�
0鈥�
s
P17
THLD3MCLR/VPP/RE3
鈫� to VDD 鈫�
鈥�
100
ns
P18
THLD4MCLR/VPP/RE3
鈫� to PGM 鈫�
0鈥�
s
P19
THIZ
Delay from PGC
鈫� to PGD High-Z
3
10
nS
P20
TPPDP
Hold time after VPP changes
5
鈥�
渭s
6.0
AC/DC CHARACTERISTICS TIMING REQUIREMENTS FOR PROGRAM/
VERIFY TEST MODE (CONTINUED)
Standard Operating Conditions
Operating Temperature: 25
掳C is recommended
Param
No.
Sym.
Characteristic
Min.
Max.
Units
Conditions
Note 1:
Do not allow excess time when transitioning MCLR between VIL and VIHH; this can cause spurious program
executions to occur. The maximum transition time is:
1 TCY + TPWRT (if enabled) + 1024 TOSC (for LP, HS, HS/PLL and XT modes only) + 2 ms (for HS/PLL mode only)
+ 1.5
渭s (for EC mode only) where TCY is the instruction cycle time, TPWRT is the Power-up Timer period and
TOSC is the oscillator period. For specific values, refer to the Electrical Characteristics section of the device data
sheet for the particular device.
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
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| PIC16F677-I/SS | IC PIC MCU FLASH 2KX14 20SSOP |
| PIC16F677-I/P | IC PIC MCU FLASH 2KX14 20DIP |
| PIC17LC44T-08/L | IC MCU OTP 8KX16 PWM 44PLCC |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| PIC18F25K22-E/ML | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32KB Flash 1536B RAM 8B nanoWatt RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC18F25K22-E/SO | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32KB Flash 1536B RAM 8B nanoWatt RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC18F25K22-E/SP | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32KB Flash 1536B RAM 8b FamilynanoWatt RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC18F25K22-E/SS | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32KB Flash 1536B RAM 8B nanoWatt RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC18F25K22-I/ML | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32KB Flash 1536B RAM 8B nanoWatt RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
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