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  • 參數(shù)資料
    型號(hào): PIC18F25K20-I/SS
    廠商: Microchip Technology
    文件頁(yè)數(shù): 16/42頁(yè)
    文件大?。?/td> 0K
    描述: IC PIC MCU FLASH 16KX16 28SSOP
    產(chǎn)品培訓(xùn)模塊: PIC18 K-Series
    XLP Deep Sleep Mode
    8-bit PIC® Microcontroller Portfolio
    標(biāo)準(zhǔn)包裝: 47
    系列: PIC® XLP™ 18F
    核心處理器: PIC
    芯體尺寸: 8-位
    速度: 64MHz
    連通性: I²C,SPI,UART/USART
    外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,HLVD,POR,PWM,WDT
    輸入/輸出數(shù): 24
    程序存儲(chǔ)器容量: 32KB(16K x 16)
    程序存儲(chǔ)器類型: 閃存
    EEPROM 大小: 256 x 8
    RAM 容量: 1.5K x 8
    電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
    數(shù)據(jù)轉(zhuǎn)換器: A/D 11x10b
    振蕩器型: 內(nèi)部
    工作溫度: -40°C ~ 85°C
    封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
    包裝: 管件
    產(chǎn)品目錄頁(yè)面: 656 (CN2011-ZH PDF)
    配用: AC164112-ND - VOLTAGE LIMITER MPLAB ICD2 VPP
    AC164307-ND - MODULE SKT FOR PM3 28SSOP
    2009 Microchip Technology Inc.
    Advance Information
    DS41297F-page 23
    PIC18F2XK20/4XK20
    3.5
    Boot Block Programming
    The code sequence detailed in Table 3-5 should be
    used, except that the address used in “Step 2” will be in
    the range of 000000h to 0007FFh.
    3.6
    Configuration Bits Programming
    Unlike code memory, the Configuration bits are
    programmed a byte at a time. The Table Write, Begin
    Programming 4-bit command (‘1111’) is used, but only
    8 bits of the following 16-bit payload will be written. The
    LSB of the payload will be written to even addresses
    and the MSB will be written to odd addresses. The
    code sequence to program two consecutive configura-
    tion locations is shown in Table 3-9. See Figure 3-5 for
    the timing diagram.
    TABLE 3-9:
    SET ADDRESS POINTER TO CONFIGURATION LOCATION
    FIGURE 3-8:
    CONFIGURATION PROGRAMMING FLOW
    Note:
    The address must be explicitly written for
    each byte programmed. The addresses
    can not be incremented in this mode.
    4-bit
    Command
    Data Payload
    Core Instruction
    Step 1: Direct access to config memory.
    0000
    8E A6
    8C A6
    84 A6
    BSF
    EECON1, EEPGD
    BSF
    EECON1, CFGS
    BSF
    EECON1, WREN
    Step 2(1): Set Table Pointer for config byte to be written. Write even/odd addresses.
    0000
    1111
    0000
    1111
    0000
    0E 30
    6E F8
    0E 00
    6E F7
    0E 00
    6E F6
    <MSB ignored><LSB>
    00 00
    0E 01
    6E F6
    <MSB><LSB ignored>
    00 00
    MOVLW
    30h
    MOVWF
    TBLPTRU
    MOVLW
    00h
    MOVWF
    TBLPRTH
    MOVLW
    00h
    MOVWF
    TBLPTRL
    Load 2 bytes and start programming.
    NOP - hold PGC high for time P9 and low for time P10.
    MOVLW
    01h
    MOVWF
    TBLPTRL
    Load 2 bytes and start programming.
    NOP - hold PGC high for time P9A and low for time P10.
    Note 1:
    Enabling the write protection of Configuration bits (WRTC = 0 in CONFIG6H) will prevent further writing of
    Configuration bits. Always write all the Configuration bits before enabling the write protection for
    Configuration bits.
    Load Even
    Configuration
    Start
    Program
    MSB
    Delay P9 and P10
    Time for Write
    LSB
    Load Odd
    Configuration
    Address
    Done
    Start
    Delay P9 and P10
    Time for Write
    Done
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