
 2001 Microchip Technology Inc.
Advance Information
DS39541A-page 307
PIC18C601/801
INDEX
A
A/D ................................................................................... 
193A/D Converter Flag (ADIF Bit) ................................. 
195A/D Converter Interrupt, Configuring ....................... 
197ADCON0 Register .......................................... 
193ADCON1 Register .......................................... 
193ADCON2 Register ................................................... 
193ADRES Register ............................................. 
193Analog Port Pins, Configuring ................................. 
199Associated Registers ............................................... 
201Block Diagram ......................................................... 
196Block Diagram, Analog Input Model ........................ 
197Configuring the Module ........................................... 
197Conversion Clock (TAD) ........................................... 199 Conversion Status (GO/DONE Bit) .......................... 
195Conversions ............................................................. 
200Converter Characteristics ............................... 
272Effects of a RESET .................................................. 
206Equations
Acquisition Time .............................................. 
198Minimum Charging Time ................................. 
198Operation During SLEEP ......................................... 
206Sampling Requirements .......................................... 
198Sampling Time ......................................................... 
198Special Event Trigger (CCP) .......................... 
144Timing Diagram ....................................................... 
293Absolute Maximum Ratings ............................................. 
265Access Bank ...................................................................... 
58ADCON0 Register ........................................................... 
193GO/DONE Bit .......................................................... 
195Registers
ADCON2 (A/D Control 2) ................................. 
195ADCON1 Register .................................................. 
193ADCON2 Register ........................................................... 
193ADDLW ............................................................................ 
221ADDWF ............................................................................ 
221ADDWFC ......................................................................... 
222ADRES Register ..................................................... 
193AKS .................................................................................. 
167ANDLW ............................................................................ 
222ANDWF ............................................................................ 
223Assembler
MPASM Assembler ................................................. 
259B
Bank Select Register ......................................................... 
58Baud Rate Generator ....................................................... 
164Associated Registers ............................................... 
179BC .................................................................................... 
223BCF .................................................................................. 
224BF .................................................................................... 
167Block Diagram ................................................................. 
119Block Diagrams
A/D ........................................................................... 
196Baud Rate Generator .............................................. 
164Capture Mode Operation ......................................... 
143Compare Mode Operation ....................................... 
144Interrupt Logic ............................................................ 
90Low Voltage Detect ................................................. 
203MSSP
I2C Mode ......................................................... 159 SPI Mode ......................................................... 
153On-Chip Reset Circuit, Simplified .............................. 
29Phase Lock Loop ...................................................... 
23PORTA
RA3:RA0 and RA5 Pins .................................. 
103RA4/T0CKI Pin ................................................ 
104PORTB
RB3 Pin ........................................................... 
106RB3:RB0 Port Pins .......................................... 
106RB7:RB4 Port Pins .......................................... 
105PORTC .................................................................... 
108PORTD
I/O Mode ......................................................... 
110System Bus Mode ........................................... 
111PORTD (In I/O Port Mode) ...................................... 
124PORTE
I/O Mode ......................................................... 
113System Bus Mode ........................................... 
114PORTF
RF2:RF0 Pins .................................................. 
116RF5:RF3 Pins .................................................. 
117RF7:RF6 Pins .................................................. 
117PORTG
I/O Mode ......................................................... 
119System Bus Mode ........................................... 
120PORTH
RH3:RH0 Pins (I/O Mode) ............................... 
121RH3:RH0 Pins (System Bus Mode) ................ 
122RH7:RH4 Pins ................................................. 
121PORTJ
I/O Mode ......................................................... 
124System Bus Mode ........................................... 
125Simplified PWM Diagram ........................................ 
146SSP (SPI Mode) ...................................................... 
153Timer0
16-bit Mode ..................................................... 
1288-bit Mode ....................................................... 
128Timer1 ..................................................................... 
13116-bit R/W Mode ............................................. 
132Timer2 ..................................................................... 
136Timer3 ..................................................................... 
13816-bit R/W Mode ............................................. 
138USART
Asynchronous Receive ................................... 
185Asynchronous Transmit .................................. 
183Watchdog Timer ...................................................... 
211BN ................................................................................... 
224BNC ................................................................................. 
225BNN ................................................................................. 
225BNOV .............................................................................. 
226BNZ ................................................................................. 
226BOV ................................................................................. 
229BRA ................................................................................. 
227BRG ................................................................................. 
164BSF ................................................................................. 
227BTFSC ............................................................................. 
228BTFSS ............................................................................. 
228BTG ................................................................................. 
229Bus .................................................................................. 
176Bus Collision During a RESTART Condition ................... 
175Bus Collision During a START Condition ........................ 
173Bus Collision During a STOP Condition .......................... 
176BZ .................................................................................... 
230