PIC18F2221/2321/4221/4321 FAMILY
DS39689F-page 18
2009 Microchip Technology Inc.
TABLE 1-3:
PIC18F4221/4321 PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
PDIP
QFN TQFP
MCLR/VPP/RE3
MCLR
VPP
RE3
118
18
I
P
I
ST
Master Clear (input) or programming voltage (input).
Master Clear (Reset) input. This pin is an active-low
Reset to the device.
Programming voltage input.
Digital input.
OSC1/CLKI/RA7
OSC1
CLKI
RA7
13
32
30
I
I/O
Analog
TTL
Oscillator crystal or external clock input.
Oscillator crystal input or external clock source input.
ST buffer when configured in RC mode;
analog otherwise.
External clock source input. Always associated with
pin function OSC1. (See related OSC1/CLKI,
OSC2/CLKO pins.)
General purpose I/O pin.
OSC2/CLKO/RA6
OSC2
CLKO
RA6
14
33
31
O
I/O
—
TTL
Oscillator crystal or clock output.
Oscillator crystal output. Connects to crystal
or resonator in Crystal Oscillator mode.
In RC, EC and INTIO modes, OSC2 pin outputs
CLKO which has one-fourth the frequency of OSC1
and denotes the instruction cycle rate.
General purpose I/O pin.
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
I
= Input
P = Power
I2C = ST with I2C or SMB levels
O
= Output
Note 1: Default assignment for CCP2 when Configuration bit, CCP2MX, is set.
2: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.
