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| 鍨嬭櫉锛� | PIC18F13K50-I/P |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 133/285闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC PIC MCU FLASH 4KX16 20-PDIP |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | XLP Deep Sleep Mode 8-bit PIC® Microcontroller Portfolio |
| 妯欐簴鍖呰锛� | 22 |
| 绯诲垪锛� | PIC® XLP™ 18F |
| 鏍稿績铏曠悊鍣細 | PIC |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 48MHz |
| 閫ｉ€氭€э細 | I²C锛孲PI锛孶ART/USART锛孶SB |
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| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 14 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 8KB锛�4K x 16锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| EEPROM 澶у皬锛� | 256 x 8 |
| RAM 瀹归噺锛� | 512 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.8 V ~ 5.5 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 11x10b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 20-DIP锛�0.300"锛�7.62mm锛� |
| 鍖呰锛� | 绠′欢 |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 642 (CN2011-ZH PDF) |
| 閰嶇敤锛� | DV164126-ND - KIT DEVELOPMENT USB W/PICKIT 2 DM164127-ND - KIT DEVELOPMENT USB 18F14/13K50 AC164112-ND - VOLTAGE LIMITER MPLAB ICD2 VPP |
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2006 Microchip Technology Inc.
Preliminary
DS70178C-page 217
dsPIC30F1010/202X
18.11 In-Circuit Debugger
When MPLAB ICD 2 is selected as a debugger, the
in-circuit debugging functionality is enabled. This func-
tion allows simple debugging functions when used with
MPLAB IDE. When the device has this feature enabled,
some of the resources are not available for general
use. These resources include the first 80 bytes of data
RAM and two I/O pins.
One of four pairs of Debug I/O pins may be selected by
the user using configuration options in MPLAB IDE.
These pin pairs are named EMUD/EMUC, EMUD1/
EMUC1 and EMUD2/EMUC2.
In each case, the selected EMUD pin is the Emulation/
Debug Data line, and the EMUC pin is the Emulation/
Debug Clock line. These pins will interface to the
MPLAB ICD 2 module available from Microchip. The
selected pair of Debug I/O pins is used by
MPLAB ICD 2 to send commands and receive
responses, as well as to send and receive data. To use
the in-circuit debugging function of the device, the
design must implement ICSP connections to MCLR,
VDD, VSS, PGC, PGD and the selected
EMUDx/EMUCx pin pair.
This gives rise to two possibilities:
1.
If EMUD/EMUC is selected as the debug I/O pin
pair, then only a 5-pin interface is required, as
the EMUD and EMUC pin functions are multi-
plexed with the PGD and PGC pin functions in
all dsPIC30F devices.
2.
If
EMUD1/EMUC1
or
EMUD2/EMUC2
is
selected as the debug I/O pin pair, then a 7-pin
interface is required, as the EMUDx/EMUCx pin
functions (x = 1 or 2) are not multiplexed with the
PGD and PGC pin functions.
TABLE 18-7:
FWDT AND FPOR BIT DESCRIPTIONS FOR dsPIC30F1010/202X
Bit Field
Register
Description
FWDTEN
FWDT
Watchdog Timer Enable bit
1
= Watchdog Timer always enabled. (LPRC oscillator cannot be dis-
abled. Clearing the SWDTEN bit in the RCON register will have no
effect.)
0
= Watchdog Timer enabled/disabled by user software (LPRC can be
disabled by clearing the SWDTEN bit in the RCON register)
WWDTEN
FWDT
Watchdog Timer Window Enable bit
1
= Watchdog Timer in Non-Window mode
0
= Watchdog Timer in Window mode
WDTPRE
FWDT
Watchdog Timer Prescaler bit
1
= 1:128
0
= 1:32
WDTPOST<3:0>
FWDT
Watchdog Timer Postscaler bits
1111
= 1:32, 768
1110
= 1:16, 384
.
0001
= 1:2
0000
= 1:1
FPWRT<2:0>
FPOR
Power-on Reset Timer Value Select bits
111
= PWRT = 128 ms
110
= PWRT = 64 ms
101
= PWRT = 32 ms
100
= PWRT = 16 ms
011
= PWRT = 8 ms
010
= PWRT = 4 ms
001
= PWRT = 2 ms
000
= PWRT = Disabled
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