
2001 Microchip Technology Inc.
Advance Information
DS39541A-page 55
PIC18C601/801
FD7h
TMR0H
Timer0 Register High Byte
0000 0000
FD6h
TMR0L
Timer0 Register Low Byte
xxxx xxxx
uuuu uuuu
FD5h
T0CON
TMR0ON
16BIT
T0CS
T0SE
T0PS3
T0PS2
T0PS1
T0PS0
1111 1111
FD4h
Reserved
rrrr rrrr
FD3h
OSCCON(2)
—
LOCK
PLLEN
SCS1
SCS0
---- 0000
---- uuu0
FD2h
LVDCON(2)
—
IRVST
LVDEN
LVV3
LVV2
LVV1
LVV0
--00 0101
FD1h
WDTCON(2)
—
WDPS2
WDPS1
WDPS0
SWDTEN ---- 0000 ---- xxxx
FD0h
RCON
IPEN
r
—
RI
TO
PD
POR
r
00-1 11qq
00-q qquu
FCFh
TMR1H
Timer1 Register High Byte
xxxx xxxx
uuuu uuuu
FCEh
TMR1L
Timer1 Register Low Byte
xxxx xxxx
uuuu uuuu
FCDh
T1CON
RD16
—
T1CKPS1
T1CKPS0
T1OSCEN
T1SYNC
TMR1CS
TMR1ON
0-00 0000
u-uu uuuu
FCCh
TMR2
Timer2 Register
0000 0000
FCBh
PR2
Timer2 Period Register
1111 1111
FCAh
T2CON
—
TOUTPS3
TOUTPS2
TOUTPS1
TOUTPS0
TMR2ON
T2CKPS1
T2CKPS0 -000 0000 -000 0000
FC9h
SSPBUF
SSP Receive Buffer/Transmit Register
xxxx xxxx
uuuu uuuu
FC8h
SSPADD
SSP Address Register in I2C Slave Mode. SSP Baud Rate Reload Register in I2C Master Mode
0000 0000
FC7h
SSPSTAT
SMP
CKE
D/A
PS
R/W
UA
BF
0000 0000
FC6h
SSPCON1
WCOL
SSPOV
SSPEN
CKP
SSPM3
SSPM2
SSPM1
SSPM0
0000 0000
FC5h
SSPCON2
GCEN
ACKSTAT
ACKDT
ACKEN
RCEN
PEN
RSEN
SEN
0000 0000
FC4h
ADRESH
A/D Result Register High Byte
xxxx xxxx
uuuu uuuu
FC3h
ADRESL
A/D Result Register Low Byte
xxxx xxxx
uuuu uuuu
FC2h
ADCON0
—
CHS3
CHS2
CHS1
CHS0
GO/DONE
ADON
--00 0000
FC1h
ADCON1
—
VCFG1
VCFG0
PCFG3
PCFG2
PCFG1
PCFG0
--00 0000
FC0h
ADCON2
ADFM
—
ADCS2
ADCS1
ADCS0
0--- -000
FBFh
CCPR1H
Capture/Compare/PWM Register1 High Byte
xxxx xxxx
uuuu uuuu
FBEh
CCPR1L
Capture/Compare/PWM Register1 Low Byte
xxxx xxxx
uuuu uuuu
FBDh
CCP1CON
—
DC1B1
DC1B0
CCP1M3
CCP1M2
CCP1M1
CCP1M0
--00 0000
FBCh
CCPR2H
Capture/Compare/PWM Register2 High Byte
xxxx xxxx
uuuu uuuu
FBBh
CCPR2L
Capture/Compare/PWM Register2 Low Byte
xxxx xxxx
uuuu uuuu
FBAh
CCP2CON
—
DC2B1
DC2B0
CCP2M3
CCP2M2
CCP2M1
CCP2M0
--00 0000
--uu uuuu
FB9h
Reserved
rrrr rrrr
FB8h
Reserved
rrrr rrrr
FB7h
Reserved
rrrr rrrr
FB6h
FB5h
FB4h
FB3h
TMR3H
Timer3 Register High Byte
xxxx xxxx
uuuu uuuu
FB2h
TMR3L
Timer3 Register Low Byte
xxxx xxxx
uuuu uuuu
FB1h
T3CON
RD16
T3CCP2
T3CKPS1
T3CKPS0
T3CCP1
T3SYNC
TMR3CS
TMR3ON
0000 0000
uuuu uuuu
TABLE 4-2:
REGISTER FILE SUMMARY - PIC18C601/801 (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR
Value on
all other
RESETS(1)
Legend
x
= unknown, u = unchanged, - = unimplemented, q = value depends on condition, r = reserved
Note 1: Other (non-power-up) RESETS include external RESET through MCLR and Watchdog Timer Reset.
2: These registers can only be modified when the Combination Lock is open.
3: These registers are available on PIC18C801 only.