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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | PIC17C766T-16E/L |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 83/159闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC MCU CMOS 16MHZ 16K EPRM84PLCC |
| 妯欐簴鍖呰锛� | 300 |
| 绯诲垪锛� | PIC® 17C |
| 鏍稿績铏曠悊鍣細 | PIC |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 16MHz |
| 閫ｉ€氭€э細 | I²C锛孲PI锛孶ART/USART |
| 澶栧湇瑷倷锛� | 娆犲妾㈡脯/寰╀綅锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 66 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 32KB锛�16K x 16锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | OTP |
| RAM 瀹归噺锛� | 902 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 4.5 V ~ 5.5 V |
| 鏁�(sh霉)鎿�(j霉)杞夋彌鍣細 | A/D 16x10b |
| 鎸暕鍣ㄥ瀷锛� | 澶栭儴 |
| 宸ヤ綔婧害锛� | -40°C ~ 125°C |
| 灏佽/澶栨锛� | 84-LCC锛圝 褰㈠紩绶氾級 |
| 鍖呰锛� | 甯跺嵎 (TR) |
| 閰嶇敤锛� | AC164318-ND - MODULE SKT MPLAB PM3 84PLCC DVA17XL841-ND - DEVICE ADAPTER FOR PIC17C762 DM173001-ND - KIT DEVELOPMENT PICDEM17 AC164027-ND - ADAPTER PICSTART PLUS 84PLCC AC174012-ND - MODULE SKT PROMATEII 84PLCC |
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2000 Microchip Technology Inc.
DS30289B-page 29
PIC17C7XX
Bank 4
PIR2
10h
000- 0010
uuu- uuuu(1)
PIE2
11h
000- 0000
uuu- uuuu
Unimplemented
12h
---- ----
RCSTA2
13h
0000 -00x
0000 -00u
uuuu -uuu
RCREG2
14h
xxxx xxxx
uuuu uuuu
TXSTA2
15h
0000 --1x
0000 --1u
uuuu --uu
TXREG2
16h
xxxx xxxx
uuuu uuuu
SPBRG2
17h
0000 0000
uuuu uuuu
Bank 5
DDRF
10h
1111 1111
uuuu uuuu
PORTF(4)
11h
0000 0000
uuuu uuuu
DDRG
12h
1111 1111
uuuu uuuu
PORTG(4)
13h
xxxx 0000
uuuu 0000
uuuu uuuu
ADCON0
14h
0000 -0-0
uuuu uuuu
ADCON1
15h
000- 0000
uuuu uuuu
ADRESL
16h
xxxx xxxx
uuuu uuuu
ADRESH
17h
xxxx xxxx
uuuu uuuu
Bank 6
SSPADD
10h
0000 0000
uuuu uuuu
SSPCON1
11h
0000 0000
uuuu uuuu
SSPCON2
12h
0000 0000
uuuu uuuu
SSPSTAT
13h
0000 0000
uuuu uuuu
SSPBUF
14h
xxxx xxxx
uuuu uuuu
Unimplemented
15h
---- ----
Unimplemented
16h
---- ----
Unimplemented
17h
---- ----
TABLE 5-4:
INITIALIZATION CONDITIONS FOR SPECIAL FUNCTION REGISTERS (CONTINUED)
Register
Address
Power-on Reset
Brown-out Reset
MCLR Reset
WDT Reset
Wake-up from SLEEP
through Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented, read as 鈥�0鈥�, q = value depends on condition
Note 1: One or more bits in INTSTA, PIR1, PIR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GLINTD bit is cleared, the PC is loaded with the interrupt
vector.
3: See Table 5-3 for RESET value of specific condition.
4: This is the value that will be in the port output latch.
5: When the device is configured for Microprocessor or Extended Microcontroller mode, the operation of this
port does not rely on these registers.
6: On any device RESET, these pins are configured as inputs.
鐩搁棞PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| PIC17C766-33E/PT | IC MCU CMOS 33MHZ 16K EPRM80TQFP |
| PIC17C766-33E/L | IC MCU CMOS 33MHZ 16K EPRM84PLCC |
| PIC16C54C-20/P | IC MCU OTP 512X12 18DIP |
| PIC17C766-16E/PT | IC MCU CMOS 16MHZ 16K EPRM80TQFP |
| PIC17C766-16E/L | IC MCU CMOS 16MHZ 16K EPRM84PLCC |
鐩搁棞浠ｇ悊鍟�/鎶€琛撳弮鏁�(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| PIC17C766T-16I/L | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 16MHz 16K EPRM RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC17C766T-16I/PT | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32KB 902 RAM 66 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC17C766T-33/L | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 33MHz 16K EPRM RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC17C766T-33/PT | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32KB 902 RAM 66 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC17C766T-33E/L | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 33MHz 16K EPRM RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
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