參數(shù)資料
    

    


    


    
型號(hào)：
PIC17C766-33E/PT

    

    
廠商：
Microchip Technology

    

    
文件頁數(shù)：
78/159頁

    

    
文件大?。?/td>
0K

    

    
描述：
IC MCU CMOS 33MHZ 16K EPRM80TQFP

    

    
標(biāo)準(zhǔn)包裝：
119

    

    
系列：
PIC® 17C

    

    
核心處理器：
PIC
    		

    

    
芯體尺寸：
8-位
    		

    

    
速度：
33MHz
    		

    

    
連通性：
I²C，SPI，UART/USART
    		

    

    
外圍設(shè)備：
欠壓檢測(cè)/復(fù)位，POR，PWM，WDT
    		

    

    
輸入/輸出數(shù)：
66
    		

    

    
程序存儲(chǔ)器容量：
32KB（16K x 16）
    		

    

    
程序存儲(chǔ)器類型：
OTP
    		

    

    
RAM 容量：
902 x 8
    		

    

    
電壓 - 電源 (Vcc/Vdd)：
4.5 V ~ 5.5 V
    		

    

    
數(shù)據(jù)轉(zhuǎn)換器：
A/D 16x10b
    		

    

    
振蕩器型：
外部
    		

    

    
工作溫度：
-40°C ~ 125°C
    		

    

    
封裝/外殼：
80-TQFP
    		

    

    
包裝：
托盤
    		

    

    
配用：
XLT80PT3-ND - SOCKET TRAN ICE 80MQFP/TQFP
    AC174011-ND - MODULE SKT PROMATEII 80TQFP
    		

    

    

    

	
    
    
    

    
    
	
    PIC17C7XX
    DS30289B-page 24
     2000 Microchip Technology Inc.
    5.1
    Power-on Reset (POR), Power-up
    Timer (PWRT), Oscillator Start-up
    Timer (OST) and Brown-out Reset
    (BOR)
    5.1.1
    POWER-ON RESET (POR)
    The Power-on Reset circuit holds the device in RESET
    until VDD is above the trip point (in the range of 1.4V -
    2.3V). The devices produce an internal RESET for both
    rising and falling VDD. To take advantage of the POR,
    just tie the MCLR/VPP pin directly (or through a resistor)
    to VDD. This will eliminate external RC components
    usually needed to create Power-on Reset. A minimum
    rise time for VDD is required. See Electrical Specifica-
    tions for details.
    Figure 5-2 and Figure 5-3 show two possible POR
    circuits.
    FIGURE 5-2:
    USING ON-CHIP POR
    FIGURE 5-3:
    EXTERNAL POWER-ON
    RESET CIRCUIT (FOR
    SLOW VDD POWER-UP)
    5.1.2
    POWER-UP TIMER (PWRT)
    The Power-up Timer provides a fixed 96 ms time-out
    (nominal) on power-up. This occurs from the rising
    edge of the internal POR signal if VDD and MCLR are
    tied, or after the first rising edge of MCLR (detected
    high). The Power-up Timer operates on an internal RC
    oscillator. The chip is kept in RESET as long as the
    PWRT is active. In most cases, the PWRT delay allows
    VDD to rise to an acceptable level.
    The power-up time delay will vary from chip to chip and
    with VDD and temperature. See DC parameters for
    details.
    5.1.3
    OSCILLATOR START-UP TIMER
    (OST)
    The Oscillator Start-up Timer (OST) provides a 1024
    oscillator cycle (1024TOSC) delay whenever the PWRT
    is invoked, or a wake-up from SLEEP event occurs in XT
    or LF mode. The PWRT and OST operate in parallel.
    The OST counts the oscillator pulses on the OSC1/
    CLKIN pin. The counter only starts incrementing after
    the amplitude of the signal reaches the oscillator input
    thresholds. This delay allows the crystal oscillator or
    resonator to stabilize before the device exits RESET.
    The length of the time-out is a function of the crystal/
    resonator frequency.
    Figure 5-4 shows the operation of the OST circuit. In
    this figure, the oscillator is of such a low frequency that
    although enabled simultaneously, the OST does not
    time-out until after the Power-up Timer time-out.
    FIGURE 5-4:
    OSCILLATOR START-UP
    TIME(LOWFREQUENCY)
    VDD
    MCLR
    PIC17CXXX
    VDD
    Note
    1:
    An external Power-on Reset circuit is
    required only if VDD power-up time is too
    slow. The diode D helps discharge the capac-
    itor quickly when VDD powers down.
    2: R < 40 k
     is recommended to ensure that the
    voltage drop across R does not exceed 0.2V
    (max. leakage current spec. on the MCLR/
    VPP pin is 5
    A). A larger voltage drop will
    degrade VIH level on the MCLR/VPP pin.
    3: R1 = 100
     to 1 k will limit any current flow-
    ing into MCLR from external capacitor C in
    the event of MCLR/VPP pin breakdown due to
    Electrostatic Discharge (ESD) or Electrical
    Overstress (EOS).
    C
    R1
    R
    D
    VDD
    MCLR
    PIC17CXXX
    VDD
    MCLR
    OSC2
    OST TIME_OUT
    PWRT TIME_OUT
    INTERNAL RESET
    TOSC1
    TOST
    TPWRT
    POR or BOR Trip Point
    This figure shows in greater detail the timings involved
    with the oscillator start-up timer. In this example, the low
    frequency crystal start-up time is larger than power-up
    time (TPWRT).
    TOSC1 = time for the crystal oscillator to react to an oscil-
    lation level detectable by the Oscillator Start-up Timer
    (OST).
    TOST = 1024TOSC.
    
    
    
    
    
    


    


    

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    相關(guān)代理商/技術(shù)參數(shù)
    		

    參數(shù)描述
    		

    
    

    
PIC17C766-33I/L
功能描述:8位微控制器 -MCU 32KB 902 RAM 66 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT

    

    
PIC17C766-33I/L
 制造商:Microchip Technology Inc 功能描述:8BIT CMOS MCU SMD 17C766 PLCC84

    

    
PIC17C766-33I/PT
功能描述:8位微控制器 -MCU 32KB 902 RAM 66 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT

    

    
PIC17C766T-16/L
功能描述:8位微控制器 -MCU 16MHz 16K EPRM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT

    

    
PIC17C766T-16/PT
功能描述:8位微控制器 -MCU 32KB 902 RAM 66 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT

    

    
    
    
    
	
    	
    
    
     
     
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