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XMEGA A [MANUAL]
8077I–AVR–11/2012
17.4
Register Summary
17.5
Interrupt Vector Summary
Table 17-2. RTC interrupt vectors and their word offset.
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page
+0x00
CTRL
–
PRESCALER[2:0]
+0x01
STATUS
–
SYNCBUSY
+0x02
INTCTRL
–
COMPINTLVL[1:0]
OVFINTLVL[1:0]
+0x03
INTFLAGS
–
COMPIF
OVFIF
+0x04
TEMP
–
COMPIF
OVFIF
+0x05
Reserved
–
+0x06
Reserved
–
+0x07
Reserved
–
+0x08
CNTL
TEMP[7:0]
+0x09
CNTH
CNT[7:0]
+0x0A
PERL
CNT[15:8]
+0x0B
PERH
PER[7:0]
+0x0C
COMPL
PER[15:8]
+0x0D
COMPH
COMP[7:0]
Offset
Source
Interrupt description
0x00
OVF_vect
Real-time counter overflow interrupt vector
0x02
COMP_vect
Real-time counter compare match interrupt vector