80h(2) INDF Addressing this" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� PIC16LF723-E/SS
寤犲晢锛� Microchip Technology
鏂囦欢闋佹暩(sh霉)锛� 168/274闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC PIC MCU FLASH 7KB 28-SSOP
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� XLP Deep Sleep Mode
8-bit PIC® Microcontroller Portfolio
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 47
绯诲垪锛� PIC® XLP™ 16F
鏍稿績铏曠悊鍣細 PIC
鑺珨灏哄锛� 8-浣�
閫熷害锛� 20MHz
閫ｉ€氭€э細 I²C锛孲PI锛孶ART/USART
澶栧湇瑷�(sh猫)鍌欙細 娆犲妾㈡脯/寰�(f霉)浣�锛孭OR锛孭WM锛學DT
杓稿叆/杓稿嚭鏁�(sh霉)锛� 25
绋嬪簭瀛樺劜鍣ㄥ閲忥細 7KB锛�4K x 14锛�
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 闁冨瓨
RAM 瀹归噺锛� 192 x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 1.8 V ~ 3.6 V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� A/D 11x8b
鎸暕鍣ㄥ瀷锛� 鍏�(n猫i)閮�
宸ヤ綔婧害锛� -40°C ~ 125°C
灏佽/澶栨锛� 28-SSOP锛�0.209"锛�5.30mm 瀵級
鍖呰锛� 绠′欢
鐢�(ch菐n)鍝佺洰閷勯爜闈細 640 (CN2011-ZH PDF)
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�绗�25闋�绗�26闋�绗�27闋�绗�28闋�绗�29闋�绗�30闋�绗�31闋�绗�32闋�绗�33闋�绗�34闋�绗�35闋�绗�36闋�绗�37闋�绗�38闋�绗�39闋�绗�40闋�绗�41闋�绗�42闋�绗�43闋�绗�44闋�绗�45闋�绗�46闋�绗�47闋�绗�48闋�绗�49闋�绗�50闋�绗�51闋�绗�52闋�绗�53闋�绗�54闋�绗�55闋�绗�56闋�绗�57闋�绗�58闋�绗�59闋�绗�60闋�绗�61闋�绗�62闋�绗�63闋�绗�64闋�绗�65闋�绗�66闋�绗�67闋�绗�68闋�绗�69闋�绗�70闋�绗�71闋�绗�72闋�绗�73闋�绗�74闋�绗�75闋�绗�76闋�绗�77闋�绗�78闋�绗�79闋�绗�80闋�绗�81闋�绗�82闋�绗�83闋�绗�84闋�绗�85闋�绗�86闋�绗�87闋�绗�88闋�绗�89闋�绗�90闋�绗�91闋�绗�92闋�绗�93闋�绗�94闋�绗�95闋�绗�96闋�绗�97闋�绗�98闋�绗�99闋�绗�100闋�绗�101闋�绗�102闋�绗�103闋�绗�104闋�绗�105闋�绗�106闋�绗�107闋�绗�108闋�绗�109闋�绗�110闋�绗�111闋�绗�112闋�绗�113闋�绗�114闋�绗�115闋�绗�116闋�绗�117闋�绗�118闋�绗�119闋�绗�120闋�绗�121闋�绗�122闋�绗�123闋�绗�124闋�绗�125闋�绗�126闋�绗�127闋�绗�128闋�绗�129闋�绗�130闋�绗�131闋�绗�132闋�绗�133闋�绗�134闋�绗�135闋�绗�136闋�绗�137闋�绗�138闋�绗�139闋�绗�140闋�绗�141闋�绗�142闋�绗�143闋�绗�144闋�绗�145闋�绗�146闋�绗�147闋�绗�148闋�绗�149闋�绗�150闋�绗�151闋�绗�152闋�绗�153闋�绗�154闋�绗�155闋�绗�156闋�绗�157闋�绗�158闋�绗�159闋�绗�160闋�绗�161闋�绗�162闋�绗�163闋�绗�164闋�绗�165闋�绗�166闋�绗�167闋�鐣�(d膩ng)鍓嶇168闋�绗�169闋�绗�170闋�绗�171闋�绗�172闋�绗�173闋�绗�174闋�绗�175闋�绗�176闋�绗�177闋�绗�178闋�绗�179闋�绗�180闋�绗�181闋�绗�182闋�绗�183闋�绗�184闋�绗�185闋�绗�186闋�绗�187闋�绗�188闋�绗�189闋�绗�190闋�绗�191闋�绗�192闋�绗�193闋�绗�194闋�绗�195闋�绗�196闋�绗�197闋�绗�198闋�绗�199闋�绗�200闋�绗�201闋�绗�202闋�绗�203闋�绗�204闋�绗�205闋�绗�206闋�绗�207闋�绗�208闋�绗�209闋�绗�210闋�绗�211闋�绗�212闋�绗�213闋�绗�214闋�绗�215闋�绗�216闋�绗�217闋�绗�218闋�绗�219闋�绗�220闋�绗�221闋�绗�222闋�绗�223闋�绗�224闋�绗�225闋�绗�226闋�绗�227闋�绗�228闋�绗�229闋�绗�230闋�绗�231闋�绗�232闋�绗�233闋�绗�234闋�绗�235闋�绗�236闋�绗�237闋�绗�238闋�绗�239闋�绗�240闋�绗�241闋�绗�242闋�绗�243闋�绗�244闋�绗�245闋�绗�246闋�绗�247闋�绗�248闋�绗�249闋�绗�250闋�绗�251闋�绗�252闋�绗�253闋�绗�254闋�绗�255闋�绗�256闋�绗�257闋�绗�258闋�绗�259闋�绗�260闋�绗�261闋�绗�262闋�绗�263闋�绗�264闋�绗�265闋�绗�266闋�绗�267闋�绗�268闋�绗�269闋�绗�270闋�绗�271闋�绗�272闋�绗�273闋�绗�274闋�
2009 Microchip Technology Inc.
DS41341E-page 25
PIC16F72X/PIC16LF72X
Bank 1
80h(2)
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
xxxx xxxx
81h
OPTION_REG
RBPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
82h(2)
PCL
Program Counter (PC) Least Significant Byte
0000 0000
83h(2)
STATUS
IRP
RP1
RP0
TO
PD
ZDC
C
0001 1xxx
84h(2)
FSR
Indirect Data Memory Address Pointer
xxxx xxxx
85h
TRISA
TRISA7
TRISA6
TRISA5
TRISA4
TRISA3
TRISA2
TRISA1
TRISA0
1111 1111
86h
TRISB
TRISB7
TRISB6
TRISB5
TRISB4
TRISB3
TRISB2
TRISB1
TRISB0
1111 1111
87h
TRISC
TRISC7
TRISC6
TRISC5
TRISC4
TRISC3
TRISC2
TRISC1
TRISC0
1111 1111
88h(3)
TRISD
TRISD7
TRISD6
TRISD5
TRISD4
TRISD3
TRISD2
TRISD1
TRISD0
1111 1111
89h
TRISE
鈥�
TRISE3(6)
TRISE2(3)
TRISE1(3)
TRISE0(3)
---- 1111
8Ah(1, 2)
PCLATH
鈥�
Write Buffer for the upper 5 bits of the Program Counter
---0 0000
8Bh(2)
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
8Ch
PIE1
TMR1GIE
ADIE
RCIE
TXIE
SSPIE
CCP1IE
TMR2IE
TMR1IE
0000 0000
8Dh
PIE2
鈥�
CCP2IE
---- ---0
8Eh
PCON
鈥�
鈥擯OR
BOR
---- --qq
8Fh
T1GCON
TMR1GE
T1GPOL
T1GTM
T1GSPM
T1GGO/
DONE
T1GVAL
T1GSS1
T1GSS0
0000 0x00
90h
OSCCON
鈥�
IRCF1
IRCF0
ICSL
ICSS
鈥�
--10 qq--
91h
OSCTUNE
鈥�
TUN5
TUN4
TUN3
TUN2
TUN1
TUN0
--00 0000
92h
PR2
Timer2 Period Register
1111 1111
93h
SSPADD(5)
Synchronous Serial Port (I2C
mode) Address Register
0000 0000
93h
SSPMSK(4)
Synchronous Serial Port (I2C
mode) Address Mask Register
1111 1111
94h
SSPSTAT
SMP
CKE
D/A
PS
R/W
UA
BF
0000 0000
95h
WPUB
WPUB7
WPUB6
WPUB5
WPUB4
WPUB3
WPUB2
WPUB1
WPUB0
1111 1111
96h
IOCB
IOCB7
IOCB6
IOCB5
IOCB4
IOCB3
IOCB2
IOCB1
IOCB0
0000 0000
97h
鈥�
Unimplemented
鈥�
98h
TXSTA
CSRC
TX9
TXEN
SYNC
鈥�
BRGH
TRMT
TX9D
0000 -010
99h
SPBRG
BRG7
BRG6
BRG5
BRG4
BRG3
BRG2
BRG1
BRG0
0000 0000
9Ah
鈥�
Unimplemented
鈥�
9Bh
鈥�
Unimplemented
鈥�
9Ch
APFCON
鈥�
SSSEL
CCP2SEL
---- --00
9Dh
FVRCON
FVRRDY
FVREN
鈥�
ADFVR1
ADFVR0
q0-- --00
9Eh
鈥�
Unimplemented
鈥�
9Fh
ADCON1
鈥�
ADCS2
ADCS1
ADCS0
鈥�
ADREF1
ADREF0
0000 --00
TABLE 2-1:
PIC16F72X/PIC16LF72X SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Page
Legend:
x
= unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as 鈥�0鈥�, r = reserved.
Shaded locations are unimplemented, read as 鈥�0鈥�.
Note
1:
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8>, whose contents are
transferred to the upper byte of the program counter.
2:
These registers can be addressed from any bank.
3:
These registers/bits are not implemented on PIC16F722/723/726/PIC16LF722/723/726 devices, read as 鈥�0鈥�.
4:
Accessible only when SSPM<3:0> = 1001.
5:
Accessible only when SSPM<3:0>
鈮� 1001.
6:
This bit is always 鈥�1鈥� as RE3 is input only.
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
CS3106A-10SL-56S CONN PLUG 2POS STRAIGHT W/SCKT
VE-J4L-IW-F3 CONVERTER MOD DC/DC 28V 100W
PIC16F723-E/SS IC PIC MCU FLASH 4KX14 28-SSOP
V150C28H150BF CONVERTER MOD DC/DC 28V 150W
V150C28H150BL3 CONVERTER MOD DC/DC 28V 150W
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
PIC16LF723-I/ML 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7 KB Flash 1.8V-5.5V 16 MHz Int Osc RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
PIC16LF723-I/SO 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7 KB Flash 1.8V-5.5V 16 MHz Int Osc RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
PIC16LF723-I/SP 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7KB 1.8-3.6V 16MHz 8b ADC CCP Lo Pwr RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
PIC16LF723-I/SS 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7KB 1.8-3.6V 16MHz 8b ADC CCP Lo Pwr RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
PIC16LF723T-I/ML 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7 KB Flash 1.8V-5.5V 16 MHz Int Osc RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
鐧�(f膩)甯冪穵鎬ラ噰璩�锛�3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京(f霉)銆�

閲囪臣闇€姹�

(鑻ュ彧閲囪臣涓€姊濆瀷铏�锛屽～瀵竴琛屽嵆鍙�)

鐧�(f膩)甯冩垚鍔�锛佹偍鍙互绻肩簩(x霉)鐧�(f膩)甯冮噰璩�銆備篃鍙互閫�(j矛n)鍏ユ垜鐨勫悗鑷�锛屾煡鐪嬪牨(b脿o)鍍�(ji脿)

鐧�(f膩)甯冩垚鍔�锛佹偍鍙互绻肩簩(x霉)鐧�(f膩)甯冮噰璩笺€備篃鍙互閫�(j矛n)鍏ユ垜鐨勫悗鑷�锛屾煡鐪嬪牨(b脿o)鍍�(ji脿)

*鍨嬭櫉 *鏁�(sh霉)閲� 寤犲晢 鎵硅櫉 灏佽
娣诲姞鏇村閲囪臣

鎴戠殑鑱�(li谩n)绯绘柟寮�

*
*
*
    • 鎴�
    • 閲囪喘
    • 鎼滅储
    • 浼氬憳