參數(shù)資料
型號(hào)： PIC16LF721-E/ML
廠商： Microchip Technology
文件頁(yè)數(shù)： 69/135頁(yè)
文件大小： 0K
描述： MCU PIC 3.5KB FLASH 20QFN
標(biāo)準(zhǔn)包裝： 91
系列： PIC® XLP™ 16F
核心處理器： PIC
芯體尺寸： 8-位
速度： 16MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 17
程序存儲(chǔ)器容量： 7KB（4K x 14）
程序存儲(chǔ)器類(lèi)型： 閃存
RAM 容量： 256 x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 12x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 20-VFQFN 裸露焊盤(pán)
包裝： 管件
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2010-2011 Microchip Technology Inc.
Preliminary
DS41430C-page 39
PIC16(L)F720/721
4.3
Interrupts During Sleep
Some interrupts can be used to wake from Sleep. To
wake from Sleep, the peripheral must be able to
operate without the system clock. The interrupt source
must have the appropriate Interrupt Enable bit(s) set
prior to entering Sleep.
On waking from Sleep, if the GIE bit is also set, the
processor will branch to the interrupt vector. Otherwise,
the processor will continue executing instructions after
the SLEEP instruction. The instruction directly after the
SLEEP instruction will always be executed before
branching to the ISR. Refer to the Section 19.0
4.4
INT Pin
The
external
interrupt,
INT
pin,
causes
an
asynchronous, edge-triggered interrupt. The INTEDG bit
of the OPTION_REG register determines on which edge
the interrupt will occur. When the INTEDG bit is set, the
rising edge will cause the interrupt. When the INTEDG
bit is clear, the falling edge will cause the interrupt. The
INTF bit of the INTCON register will be set when a valid
edge appears on the INT pin. If the GIE and INTE bits
are also set, the processor will redirect program
execution to the interrupt vector. This interrupt is
disabled by clearing the INTE bit of the INTCON register.
4.5
Context Saving
When an interrupt occurs, only the return PC value is
saved to the stack. If the ISR modifies or uses an
instruction that modifies key registers, their values
must be saved at the beginning of the ISR and restored
when the ISR completes. This prevents instructions
following the ISR from using invalid data. Examples of
key registers include the W, STATUS, FSR and
PCLATH registers.
The code shown in Example 4-1 can be used to do the
following.
Save the W register
Save the STATUS register
Save the PCLATH register
Execute the ISR program
Restore the PCLATH register
Restore the STATUS register
Restore the W register
Since most instructions modify the W register, it must
be saved immediately upon entering the ISR. The
SWAPF instruction is used when saving and restoring
the W and STATUS registers because it will not affect
any bits in the STATUS register. It is useful to place
W_TEMP in shared memory because the ISR cannot
predict which bank will be selected when the interrupt
occurs.
The processor will branch to the interrupt vector by
loading the PC with 0004h. The PCLATH register will
remain unchanged. This requires the ISR to ensure
that the PCLATH register is set properly before using
an instruction that causes PCLATH to be loaded into
details on PC operation.
EXAMPLE 4-1:
SAVING W, STATUS AND PCLATH REGISTERS IN RAM
Note:
The microcontroller does not normally
require saving the PCLATH register.
However, if computed GOTOs are used,
the PCLATH register must be saved at the
beginning of the ISR and restored when
the ISR is complete to ensure correct
program flow.
MOVWFW_TEMP
;Copy W to W_TEMP register
SWAPFSTATUS,W
;Swap status to be saved into W
;Swaps are used because they do not affect the status bits
BANKSELSTATUS_TEMP
;Select regardless of current bank
MOVWFSTATUS_TEMP
;Copy status to bank zero STATUS_TEMP register
MOVF
PCLATH,W
;Copy PCLATH to W register
MOVWF
PCLATH_TEMP
;Copy W register to PCLATH_TEMP
:
:(ISR)
;Insert user code here
:
BANKSELSTATUS_TEMP
;Select regardless of current bank
MOVF
PCLATH_TEMP,W ;
MOVWF
PCLATH
;Restore PCLATH
SWAPFSTATUS_TEMP,W
;Swap STATUS_TEMP register into W
;(sets bank to original state)
MOVWFSTATUS
;Move W into STATUS register
SWAPFW_TEMP,F
;Swap W_TEMP
SWAPFW_TEMP,W
;Swap W_TEMP into W
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參數(shù)描述
PIC16LF721-I/ML 功能描述:8位微控制器 -MCU 7 KB FLASH 256 B SRAM, 18 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC16LF721-I/P 功能描述:8位微控制器 -MCU 7 KB FLASH 256 B SRAM, 18 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC16LF721-I/SO 功能描述:8位微控制器 -MCU 7 KB FLASH 256 B SRAM, 18 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC16LF721-I/SS 功能描述:8位微控制器 -MCU 7 KB FLASH 256 B SRAM, 18 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC16LF721-I/SS 制造商:Microchip Technology Inc 功能描述:IC, 8BIT MCU, PIC16LF, 16MHZ, SSOP-20; Controller Family/Series:PIC16LF; Core Size:8 bit; No. of I/O's:18; Program Memory Size:7KB; RAM Memory Size:256Byte; CPU Speed:16MHz; Oscillator Type:External, Internal; No. of Timers:3 ;RoHS Compliant: No
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