
2011 Microchip Technology Inc.
Preliminary
DS41586A-page 52
PIC16(L)F1507
TABLE 5-2:
SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK SOURCES
TABLE 5-3:
SUMMARY OF CONFIGURATION WORD WITH CLOCK SOURCES
REGISTER 5-2:
OSCSTAT: OSCILLATOR STATUS REGISTER
U-0
R-0/q
U-0
R-0/q
—
HFIOFR
—
LFIOFR
HFIOFS
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
q = Conditional
bit 7-5
Unimplemented:
Read as ‘0’
bit 4
HFIOFR:
High Frequency Internal Oscillator Ready bit
1
= 16 MHz Internal Oscillator (HFINTOSC) is ready
0
= 16 MHz Internal Oscillator (HFINTOSC) is not ready
bit 3-2
Unimplemented:
Read as ‘0’
bit 1
LFIOFR:
Low Frequency Internal Oscillator Ready bit
1
= 31 kHz Internal Oscillator (LFINTOSC) is ready
0
= 31 kHz Internal Oscillator (LFINTOSC) is not ready
bit 0
HFIOFS:
High Frequency Internal Oscillator Stable bit
1
= 16 MHz Internal Oscillator (HFINTOSC) is stable
0
= 16 MHz Internal Oscillator (HFINTOSC) is not yet stable.
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
OSCCON
—
IRCF<3:0>
—SCS<1:0>
OSCSTAT
—
HFIOFR
—
LFIOFR
HFIOFS
Legend:
— = unimplemented location, read as ‘0’. Shaded cells are not used by clock sources.
Name
Bits
Bit -/7
Bit -/6
Bit 13/5
Bit 12/4
Bit 11/3
Bit 10/2
Bit 9/1
Bit 8/0
Register
on Page
CONFIG1
13:8
—
—CLKOUTEN
BOREN<1:0>
—
7:0
CP
MCLRE
PWRTE
WDTE<1:0>
—
FOSC<1:0>
Legend:
— = unimplemented location, read as ‘0’. Shaded cells are not used by clock sources.