參數(shù)資料
型號(hào)： PIC16LCE625T-04I/SO
廠商： Microchip Technology
文件頁(yè)數(shù)： 26/100頁(yè)
文件大?。?/td> 0K
描述： IC MCU CMOS 2K OTP W/EEPRM18SOIC
標(biāo)準(zhǔn)包裝： 1,100
系列： PIC® 16C
核心處理器： PIC
芯體尺寸： 8-位
速度： 4MHz
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，WDT
輸入/輸出數(shù)： 13
程序存儲(chǔ)器容量： 3.5KB（2K x 14）
程序存儲(chǔ)器類型： OTP
EEPROM 大?。?/td> 128 x 8
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 2.5 V ~ 5.5 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 18-SOIC（0.295"，7.50mm 寬）
包裝： 帶卷 (TR)
其它名稱： PIC16LCE625T04ISO
1999 Microchip Technology Inc.
DS40182C-page 21
PIC16CE62X
4.4
Indirect Addressing, INDF and FSR
Registers
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
Indirect addressing is possible by using the INDF reg-
ister. Any instruction using the INDF register actually
accesses data pointed to by the File Select Register
(FSR). Reading INDF itself indirectly will produce 00h.
Writing to the INDF register indirectly results in a
no-operation (although status bits may be affected). An
effective 9-bit address is obtained by concatenating the
8-bit FSR register and the IRP bit (STATUS<7>), as
shown in Figure 4-7. However, IRP is not used in the
PIC16CE62X.
A simple program to clear RAM location 20h-2Fh using
indirect addressing is shown in Example 4-1.
EXAMPLE 4-1:
INDIRECT ADDRESSING
movlw
0x20
;initialize pointer
movwf
FSR
;to RAM
NEXT
clrf
INDF
;clear INDF register
incf
FSR
;inc pointer
btfss
FSR,4
;all done?
goto
NEXT
;no clear next
;yes continue
CONTINUE:
FIGURE 4-7:
DIRECT/INDIRECT ADDRESSING PIC16CE62X
For memory map detail see Figure 4-4 and Figure 4-5.
Note 1: The RP1 and IRP bits are reserved; always maintain these bits clear.
Data
Memory
Indirect Addressing
Direct Addressing
bank select
location select
RP1
RP0(1)
6
0
from opcode
IRP(1)
FSR Register
7
0
bank select
location select
00
01
10
11
180h
1FFh
00h
7Fh
Bank 0
Bank 1
Bank 2
Bank 3
not used
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