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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | PIC16F914-I/P |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 108/229闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC PIC MCU FLASH 4KX14 40DIP |
| 鐢�(ch菐n)鍝佸煿瑷撴ā濉婏細 | Asynchronous Stimulus 8-bit PIC® Microcontroller Portfolio |
| 妯欐簴鍖呰锛� | 10 |
| 绯诲垪锛� | PIC® 16F |
| 鏍稿績铏曠悊鍣細 | PIC |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 20MHz |
| 閫ｉ€氭€э細 | I²C锛孲PI锛孶ART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | 娆犲妾㈡脯/寰╀綅锛孡CD锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 35 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 7KB锛�4K x 14锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| EEPROM 澶у皬锛� | 256 x 8 |
| RAM 瀹归噺锛� | 256 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 2 V ~ 5.5 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 8x10b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 40-DIP锛�0.600"锛�15.24mm锛� |
| 鍖呰锛� | 绠′欢 |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 647 (CN2011-ZH PDF) |
| 閰嶇敤锛� | DM163029-ND - BOARD PICDEM FOR MECHATRONICS DVA18XP400-ND - DEVICE ADAPTER 18F4220 PDIP 40LD 444-1001-ND - DEMO BOARD FOR PICMICRO MCU |
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280
8018P鈥揂VR鈥�08/10
ATmega169P
26. Boot Loader Support 鈥� Read-While-Write Self-Programming
26.1
Features
Read-While-Write Self-Programming
Flexible Boot Memory Size
High Security (Separate Boot Lock Bits for a Flexible Protection)
Separate Fuse to Select Reset Vector
Code Efficient Algorithm
Efficient Read-Modify-Write Support
Note:
1. A page is a section in the Flash consisting of several bytes (see Table 27-7 on page 299) used
during programming. The page organization does not affect normal operation.
26.2
Overview
The Boot Loader Support provides a real Read-While-Write Self-Programming mechanism for
downloading and uploading program code by the MCU itself. This feature allows flexible applica-
tion software updates controlled by the MCU using a Flash-resident Boot Loader program. The
Boot Loader program can use any available data interface and associated protocol to read code
and write (program) that code into the Flash memory, or read the code from the program mem-
ory. The program code within the Boot Loader section has the capability to write into the entire
Flash, including the Boot Loader memory. The Boot Loader can thus even modify itself, and it
can also erase itself from the code if the feature is not needed anymore. The size of the Boot
Loader memory is configurable with fuses and the Boot Loader has two separate sets of Boot
Lock bits which can be set independently. This gives the user a unique flexibility to select differ-
ent levels of protection.
26.3
Application and Boot Loader Flash Sections
The Flash memory is organized in two main sections, the Application section and the Boot
Loader section (see Figure 26-2 on page 283). The size of the different sections is configured by
the BOOTSZ Fuses as shown in Table 26-6 on page 292 and Figure 26-2 on page 283. These
two sections can have different level of protection since they have different sets of Lock bits.
26.3.1
Application Section
The Application section is the section of the Flash that is used for storing the application code.
The protection level for the Application section can be selected by the application Boot Lock bits
(Boot Lock bits 0), see Table 26-2 on page 284. The Application section can never store any
Boot Loader code since the SPM instruction is disabled when executed from the Application
section.
26.3.2
BLS 鈥� Boot Loader Section
While the Application section is used for storing the application code, the The Boot Loader soft-
ware must be located in the BLS since the SPM instruction can initiate a programming when
executing from the BLS only. The SPM instruction can access the entire Flash, including the
BLS itself. The protection level for the Boot Loader section can be selected by the Boot Loader
Lock bits (Boot Lock bits 1), see Table 26-3 on page 284.
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| SFW18R-1STE1 | SFW18R-1STE1-FFC/FPC CONN |
| SFW7R-2STE1 | SFW7R-2STE1-FFC/FPC CONN |
| SFW16R-2STE1 | SFW16R-2STE1-FFC/FPC CONN |
| SFW7R-1STE1 | SFW7R-1STE1-FFC/FPC CONN |
| SFW15R-1STE1 | SFW15R-1STE1-FFC/FPC CONN |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| PIC16F914T-I/ML | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7KB FL 352R 36 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC16F914T-I/PT | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7KB FL 352R 36 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC16F916-E/ML | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 14KB FL 352R 25 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
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