PIC16F88X
DS80302F-page 8
2009 Microchip Technology Inc.
FIGURE 3:
ACTUAL (INCORRECT) OPERATION WITH CLOCK STRETCHING – EXAMPLE 1
FIGURE 4:
ACTUAL (INCORRECT) OPERATION WITH CLOCK STRETCHING – EXAMPLE 2
Work around
Set the communication speed to match the
slowest device on the bus. This ensures that no
slave device will perform clock stretching.
It
is
possible
to
dynamically
adjust
the
communication speed to match the device being
addressed
by
modifying
the
BRG
register.
However, the behavior of slower slave devices
must be understood and speed adjustments made
such that no slave performs clock stretching.
Affected Silicon Revisions
PIC16F882
PIC16F883/PIC16F884
PIC16F886/PIC16F887
SDA
SCL
Master
Slave
BRG Period
SDA
SCL
Master
Slave
BRG Period
A0
X
A0
X
A2
X
