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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | PIC16F872-I/SP |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 147/167闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC MCU FLASH 2KX14 EE 28DIP |
| 鐢�(ch菐n)鍝佸煿瑷撴ā濉婏細 | Asynchronous Stimulus 8-bit PIC® Microcontroller Portfolio |
| 妯欐簴鍖呰锛� | 15 |
| 绯诲垪锛� | PIC® 16F |
| 鏍稿績铏曠悊鍣細 | PIC |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 20MHz |
| 閫ｉ€氭€э細 | I²C锛孲PI |
| 澶栧湇瑷倷锛� | 娆犲妾㈡脯/寰╀綅锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 22 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 3.5KB锛�2K x 14锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| EEPROM 澶у皬锛� | 64 x 8 |
| RAM 瀹归噺锛� | 128 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 4 V ~ 5.5 V |
| 鏁�(sh霉)鎿�(j霉)杞夋彌鍣細 | A/D 5x10b |
| 鎸暕鍣ㄥ瀷锛� | 澶栭儴 |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 28-DIP锛�0.300"锛�7.62mm锛� |
| 鍖呰锛� | 绠′欢 |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 639 (CN2011-ZH PDF) |
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80
8048C鈥揂VR鈥�02/12
ATtiny43U
12. 8-bit Timer/Counter with PWM (Timer/Counter0 and Timer/Counter1)
12.1
Features
Two Independent Output Compare Units
Double Buffered Output Compare Registers
Clear Timer on Compare Match (Auto Reload)
Glitch Free, Phase Correct Pulse Width Modulator (PWM)
Variable PWM Period
Frequency Generator
Six Independent Interrupt Sources (TOV0, OCF0A, OCF0B, TOV1, OCF1A, and OCF1B)
12.2
Overview
Timer/Counter0 and Timer/Conter1 are general purpose Timer/Counter modules with two inde-
pendent Output Compare Units, each, and with PWM support. They allow accurate program
execution timing (event management) and wave generation.
Register and bit references in this section are written in general form. A lower case 鈥渘鈥� replaces
the Timer/Counter number, and a lower case 鈥渪鈥� replaces the Output Compare Unit, in this case
Compare Unit A or Compare Unit B. However, when using the register or bit defines in a pro-
gram, the precise form must be used, i.e., TCNT0 for accessing Timer/Counter0 counter value
and so on.
A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 12-1 on page 80. For
the actual placement of I/O pins, refer to Figure 1-1 on page 2. CPU accessible I/O Registers,
including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit loca-
tions are listed in the 鈥淩egister Description鈥� on page 92.
Figure 12-1. 8-bit Timer/Counter Block Diagram
Clock Select
Timer/Counter
D
ATA
B
U
S
OCRnA
OCRnB
=
TCNTn
Waveform
Generation
Waveform
Generation
OCnA
OCnB
=
Fixed
TOP
Value
Control Logic
= 0
TOP
BOTTOM
Count
Clear
Direction
TOVn
(Int.Req.)
OCnA
(Int.Req.)
OCnB
(Int.Req.)
TCCRnA
TCCRnB
Tn
Edge
Detector
( From Prescaler )
clk
Tn
鐩搁棞PDF璩囨枡 |
PDF鎻忚堪 |
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| ATTINY11-6PI | IC AVR MCU 1K FLASH 6MHZ IT 8DIP |
| ATTINY11-6PC | IC AVR MCU 1K FLASH 6MHZ 8DIP |
鐩搁棞浠ｇ悊鍟�/鎶€琛撳弮鏁�(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| PIC16F872T-E/SO | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB 128 RAM 22 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC16F872T-E/SS | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB 128 RAM 22 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC16F872T-I/SO | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB 128 RAM 22 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC16F872T-I/SS | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB 128 RAM 22 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC16F872T-I/SS033 | 鍒堕€犲晢:Microchip Technology Inc 鍔熻兘鎻忚堪: |
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