90
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
PCINT24, Pin Change Interrupt Source 24: The PD0 pin can serve as an external interrupt
source.
Note:
1. When enabled, the two-wire Serial Interface enables Slew-Rate controls on the output pins
PD0 and PD1. This is not shown in this table. In addition, spike filters are connected between
the AIO outputs shown in the port figure and the digital logic of the TWI module.
Table 14-13. Overriding Signals for Alternate Functions PD7:PD4.
Signal name
PD7/OC2A/
PCINT31
PD6/ICP1/
OC2B/
PCINT30
PD5/OC1A/
PCINT29
PD4/OC1B/XCK1/
PCINT28
PUOE
000
0
PUOV
000
0
DDOE
0
DDOV
0
PVOE
OC2A ENABLE
OC2B ENABLE
OC1A ENABLE
OC1B ENABLE
PVOV
OCA2A
OC2B
OC1A
OC1B
DIEOE
PCINT31 PCIE3
PCINT30 PCIE3
PCINT29 PCIE3
PCINT28 PCIE3
DIEOV
111
1
DI
PCINT31 INPUT
ICP1 INPUT
PCINT30 INPUT
PCINT29 INPUT
PCINT28 INPUT
AIO
–––
–
Table 14-14. Overriding Signals for Alternate Functions in PD3:PD0
Signal name
PD3/INT1/TXD1/
PCINT27
PD2/INT0/RXD1/
PCINT26
PD1/TXD0/
PCINT25
PD0/RXD0/
PCINT27
PUOE
TXEN1
RXEN1
TXEN0
RXEN1
PUOV
0
PORTD2 PUD
0PORTD0 PUD
DDOE
TXEN1
RXEN1
TXEN0
RXEN1
DDOV
1
0
1
0
PVOE
TXEN1
0
TXEN0
0
PVOV
TXD1
0
TXD0
0
DIEOE
INT1 ENABLE
PCINT27 PCIE3
INT2 ENABLE
PCINT26 PCIE3
PCINT25 PCIE3
PCINT24 PCIE3
DIEOV
111
1
DI
INT1 INPUT
PCINT27 INPUT
INT0 INPUT
RXD1
PCINT26 INPUT
PCINT25 INPUT
RXD0
PCINT24 INPUT
AIO
–––
–
