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參數(shù)資料
| 型號： | PIC16F74T-I/L |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 68/104頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU FLASH 4KX14 A/D 44PLCC |
| 產(chǎn)品培訓模塊： | Asynchronous Stimulus |
| 標準包裝： | 500 |
| 系列： | PIC® 16F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設備： | 欠壓檢測/復位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 33 |
| 程序存儲器容量： | 7KB（4K x 14） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 192 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x8b |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 包裝： | 帶卷 (TR) |
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Micrel, Inc.
KSZ8851-16MLLJ
March 2010
58
M9999-030210-1.0
TXQ Memory Information Register (0x78 – 0x79): TXMIR
This register indicates the amount of free memory available in the TXQ of the QMU module.
Bit
Default Value
R/W
Description
15-13
-
RO
Reserved.
12-0
-
RO
TXMA Transmit Memory Available
The amount of memory available is represented in units of byte. The TXQ memory is
used for both frame payload, control word.
Note: Software must be written to ensure that there is enough memory for the next
transmit frame including control information before transmit data is written to the TXQ.
0x7A – 0x7B: Reserved
Receive Frame Header Status Register (0x7C – 0x7D): RXFHSR
This register indicates the received frame header status information, the received frames are reported in RXFCTR
register. This register contains the status information for the frame received and the CPU can read so many times same
as the frame count value in the RXFCTR.
Bit
Default Value
R/W
Description
15
-
RO
RXFV Receive Frame Valid
When this bit is set, it indicates that the present frame in the receive packet memory is
valid. The status information currently in this location is also valid.
When clear, it indicates that there is either no pending receive frame or that the current
frame is still in the process of receiving.
14
-
RO
Reserved
13
-
RO
RXICMPFCS Receive ICMP Frame Checksum Status
When this bit is set, the KSZ8851 received ICMP frame checksum field is incorrect.
12
-
RO
RXIPFCS Receive IP Frame Checksum Status
When this bit is set, the KSZ8851 received IP header checksum field is incorrect.
11
-
RO
RXTCPFCS Receive TCP Frame Checksum Status
When this bit is set, the KSZ8851 received TCP frame checksum field is incorrect.
10
-
RO
RXUDPFCS Receive UDP Frame Checksum Status
When this bit is set, the KSZ8851 received UDP frame checksum field is incorrect.
9-8
-
RO
Reserved
7
-
RO
RXBF Receive Broadcast Frame
When this bit is set, it indicates that this frame has a broadcast address.
6
-
RO
RXMF Receive Multicast Frame
When this bit is set, it indicates that this frame has a multicast address (including the
broadcast address).
5
-
RO
RXUF Receive Unicast Frame
When this bit is set, it indicates that this frame has a unicast address.
4
-
RO
RXMR Receive MII Error
When set, it indicates that there is an MII symbol error on the received frame.
3
-
RO
RXFT Receive Frame Type
When this bit is set, it indicates that the frame is an Ethernet-type frame (frame length is
greater than 1500 bytes). When clear, it indicates that the frame is an IEEE 802.3 frame.
This bit is not valid for runt frames.
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