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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | PIC16F737-E/SS |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 147/231闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC PIC MCU FLASH 4KX14 28SSOP |
| 妯欐簴鍖呰锛� | 47 |
| 绯诲垪锛� | PIC® 16F |
| 鏍稿績铏曠悊鍣細 | PIC |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 20MHz |
| 閫ｉ€氭€э細 | I²C锛孲PI锛孶ART/USART |
| 澶栧湇瑷倷锛� | 娆犲妾㈡脯/寰╀綅锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 25 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 7KB锛�4K x 14锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| RAM 瀹归噺锛� | 368 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 4 V ~ 5.5 V |
| 鏁�(sh霉)鎿氳綁鎻涘櫒锛� | A/D 11x10b |
| 鎸暕鍣ㄥ瀷锛� | 鍏ч儴 |
| 宸ヤ綔婧害锛� | -40°C ~ 125°C |
| 灏佽/澶栨锛� | 28-SSOP锛�0.209"锛�5.30mm 瀵級 |
| 鍖呰锛� | 绠′欢 |
| 閰嶇敤锛� | I3DBF777-ND - BOARD DAUGHTER ICEPIC3 |
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PIC18F2X1X/4X1X
DS39636D-page 236
2009 Microchip Technology Inc.
FIGURE 21-3:
HIGH-VOLTAGE DETECT OPERATION (VDIRMAG = 1)
21.5
Applications
In many applications, the ability to detect a drop below
or rise above a particular threshold is desirable. For
example, the HLVD module could be periodically
enabled to detect a Universal Serial Bus (USB) attach
or detach. This assumes the device is powered by a
lower voltage source than the USB when detached. An
attach would indicate a high-voltage detect from, for
example, 3.3V to 5V (the voltage on USB) and vice
versa for a detach. This feature could save a design a
few extra components and an attach signal (input pin).
For general battery applications, Figure 21-4 shows a
possible voltage curve. Over time, the device voltage
decreases. When the device voltage reaches voltage
VA, the HLVD logic generates an interrupt at time TA.
The interrupt could cause the execution of an ISR,
which would allow the application to perform 鈥渉ouse-
keeping tasks鈥� and perform a controlled shutdown
before the device voltage exits the valid operating
range at TB. The HLVD thus would give the application
a time window, represented by the difference between
TA and TB, to safely exit.
FIGURE 21-4:
TYPICAL
HIGH/LOW-VOLTAGE
DETECT APPLICATION
VLVD
VDD
HLVDIF
VLVD
VDD
Enable HLVD
TIVRST
HLVDIF may not be set
Enable HLVD
HLVDIF
HLVDIF cleared in software
HLVDIF cleared in software,
CASE 1:
CASE 2:
HLVDIF remains set since HLVD condition still exists
TIVRST
IRVST
Internal Reference is stable
IRVST
Time
Vo
lt
a
g
e
VA
VB
TA
TB
VA = HLVD trip point
VB = Minimum valid device
operating voltage
Legend:
鐩搁棞PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| PIC16F884-I/PT | IC PIC MCU FLASH 4KX14 44TQFP |
| DSPIC30F5013T-30I/PTG | IC DSPIC MCU/DSP 66K 80TQFP |
| DSPIC30F5013T-20I/PTG | IC DSPIC MCU/DSP 66K 80TQFP |
| DSPIC30F5011T-30I/PTG | IC DSPIC MCU/DSP 66K 64TQFP |
| DSPIC30F5011T-20I/PTG | IC DSPIC MCU/DSP 66K 64TQFP |
鐩搁棞浠ｇ悊鍟�/鎶€琛撳弮鏁�(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| PIC16F737-I/ML | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7KB 368 RAM 25 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿氱附绶氬搴�:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿� RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC16F737-I/SO | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7KB 368 RAM 25 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿氱附绶氬搴�:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿� RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC16F737-I/SP | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7KB 368 RAM 25 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿氱附绶氬搴�:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿� RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC16F737-I/SP | 鍒堕€犲晢:Microchip Technology Inc 鍔熻兘鎻忚堪:IC 8BIT FLASH MCU 16F737 SDIL28 |
| PIC16F737-I/SS | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7KB 368 RAM 25 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿氱附绶氬搴�:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿� RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
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