PIC16(L)F722A/723A
DS41417B-page 74
2010-2012 Microchip Technology Inc.
6.5
PORTE and TRISE Registers
PORTE(1) is an 1-bit wide, input only port. RE3 is input
only and its TRIS bit will always read as 鈥�1鈥�.
status of the pins. RE3 reads 鈥�0鈥� when MCLRE = 1.
TABLE 6-5:
SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
REGISTER 6-12:
PORTE: PORTE REGISTER
U-0
R-x
U-0
鈥�
RE3
鈥�
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as 鈥�0鈥�
-n = Value at POR
鈥�1鈥� = Bit is set
鈥�0鈥� = Bit is cleared
x = Bit is unknown
bit 7-4
Unimplemented: Read as 鈥�0鈥�
bit 3
RE3: PORTE I/O Pin bits(1)
1 = Port pin is > VIH
0 = Port pin is < VIL
bit 2-0
Unimplemented: Read as 鈥�0鈥�
REGISTER 6-13:
TRISE: PORTE TRI-STATE REGISTER
U-0
R-1
U-0
鈥�
TRISE3
鈥�
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as 鈥�0鈥�
-n = Value at POR
鈥�1鈥� = Bit is set
鈥�0鈥� = Bit is cleared
x = Bit is unknown
bit 7-4
Unimplemented: Read as 鈥�0鈥�
bit 3
TRISE3: RE3 Port Tri-state Control bit
This bit is always 鈥�1鈥� as RE3 is an input only
bit 2-0
Unimplemented: Read as 鈥�0鈥�
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register on
Page
PORTE
鈥�
鈥斺€斺€�
RE3
鈥�
TRISE
鈥�
TRISE3(1)
鈥�
Legend: x = unknown, u = unchanged, 鈥� = unimplemented locations read as 鈥�0鈥�. Shaded cells are not used by
PORTE
Note 1: This bit is always 鈥�1鈥� as RE3 is input only.
