2009 Microchip Technology Inc.
DS40044G-page 55
PIC16F627A/628A/648A
REGISTER 8-1:
T2CON – TIMER2 CONTROL REGISTER (ADDRESS: 12h)
TABLE 8-1:
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
U-0
R/W-0
—
TOUTPS3 TOUTPS2 TOUTPS1
TOUTPS0
TMR2ON T2CKPS1 T2CKPS0
bit 7
bit 0
bit 7
Unimplemented
: Read as ‘0’
bit 6-3
TOUTPS<3:0>
: Timer2 Output Postscale Select bits
0000
= 1:1 Postscale Value
0001
= 1:2 Postscale Value
1111
= 1:16 Postscale
bit 2
TMR2ON
: Timer2 On bit
1
= Timer2 is on
0
= Timer2 is off
bit 1-0
T2CKPS<1:0>
: Timer2 Clock Prescale Select bits
00
= 1:1 Prescaler Value
01
= 1:4 Prescaler Value
1x
= 1:16 Prescaler Value
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR
Value on
all other
Resets
0Bh, 8Bh,
10Bh, 18Bh
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
0000 000u
0Ch
PIR1
EEIF
CMIF
RCIF
TXIF
—
CCP1IF
TMR2IF
TMR1IF
0000 -000
8Ch
PIE1
EEIE
CMIE
RCIE
TXIE
—
CCP1IE
TMR2IE
TMR1IE
0000 -000
11h
TMR2
Timer2 Module’s Register
0000 0000
12h
T2CON
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
92h
PR2
Timer2 Period Register
1111 1111
Legend:
x
= unknown, u = unchanged, - = unimplemented read as ‘0’. Shaded cells are not used by the Timer2 module.
