
2003 Microchip Technology Inc.
Preliminary
DS40300C-page 141
PIC16F62X
TABLE 17-8:
CAPTURE/COMPARE/PWM REQUIREMENTS
FIGURE 17-12:
TIMER0 CLOCK TIMING
TABLE 17-9:
TIMER0 CLOCK REQUIREMENTS
Param
No.
Sym
Characteristic
Min
Typ Max Units
Conditions
50*
TccL CCP
input low time
No Prescaler
0.5T
CY + 20
—
ns
With Prescaler
16F62X
10
—
ns
16LF62X
20
—
ns
51*
TccH CCP
input high time
No Prescaler
0.5T
CY + 20
—
ns
With Prescaler
16F62X
10
—
ns
16LF62X
20
—
ns
52*
TccP CCP input period
3T
CY + 40
N
—
ns
N = prescale value
(1,4 or 16)
53*
TccR CCP output rise time
16F62X
10
25
ns
16LF62X
25
45
ns
54*
TccF CCP output fall time
16F62X
10
25
ns
16LF62X
25
45
ns
*
These parameters are characterized but not tested.
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only
and are not tested.
Param
No.
Sym
Characteristic
Min
Typ Max Units
Conditions
40
Tt0H T0CKI High Pulse Width
No Prescaler
0.5 T
CY + 20*
—
ns
With Prescaler
10*
—
ns
41
Tt0L
T0CKI Low Pulse Width
No Prescaler
0.5 T
CY + 20*
—
ns
With Prescaler
10*
—
ns
42
Tt0P T0CKI Period
T
CY + 40*
N
—
ns
N = prescale value (1, 2,
4, ..., 256)
*
These parameters are characterized but not tested.
Data in “Typ” column is at 5.0V, 25
°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
41
42
40
RA4/T0CKI
TMR0