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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� PIC16F1947-I/PT
寤犲晢锛� Microchip Technology
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鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC MCU 8BIT FLASH 64TQFP
鐢㈠搧鍩硅〒妯″锛� 8-bit PIC® Microcontroller Portfolio
鐗硅壊鐢㈠搧锛� Extreme Low Power (XLP) Microcontrollers
妯欐簴鍖呰锛� 160
绯诲垪锛� PIC® XLP™ 16F
鏍稿績铏曠悊鍣細 PIC
鑺珨灏哄锛� 8-浣�
閫熷害锛� 32MHz
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杓稿叆/杓稿嚭鏁�(sh霉)锛� 54
绋嬪簭瀛樺劜鍣ㄥ閲忥細 28KB锛�16K x 14锛�
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 闁冨瓨
EEPROM 澶у皬锛� 256 x 8
RAM 瀹归噺锛� 1K x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 1.8 V ~ 5.5 V
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鍖呰锛� 绠′欢
閰嶇敤锛� MA180032-ND - MODULE PLUG-IN PIC18F66K80
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2010-2012 Microchip Technology Inc.
DS41414D-page 35
PIC16(L)F1946/1947
Bank 2
100h(2)
INDF0
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
101h(2)
INDF1
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
102h(2)
PCL
Program Counter (PC) Least Significant Byte
0000 0000 0000 0000
103h(2)
STATUS
鈥�
鈥擳O
PD
ZDC
C
---1 1000 ---q quuu
104h(2)
FSR0L
Indirect Data Memory Address 0 Low Pointer
0000 0000 uuuu uuuu
105h(2)
FSR0H
Indirect Data Memory Address 0 High Pointer
0000 0000 0000 0000
106h(2)
FSR1L
Indirect Data Memory Address 1 Low Pointer
0000 0000 uuuu uuuu
107h(2)
FSR1H
Indirect Data Memory Address 1 High Pointer
0000 0000 0000 0000
108h(2)
BSR
鈥�
BSR<4:0>
---0 0000 ---0 0000
109h(2)
WREG
Working Register
0000 0000 uuuu uuuu
10Ah(1, 2) PCLATH
鈥�
Write Buffer for the upper 7 bits of the Program Counter
-000 0000 -000 0000
10Bh(2)
INTCON
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
INTF
IOCIF
0000 000x 0000 000u
10Ch
LATA
PORTA Data Latch
xxxx xxxx uuuu uuuu
10Dh
LATB
PORTB Data Latch
xxxx xxxx uuuu uuuu
10Eh
LATC
PORTC Data Latch
xxxx xxxx uuuu uuuu
10Fh
LATD
PORTD Data Latch
xxxx xxxx uuuu uuuu
110h
LATE
PORTE Data Latch
xxxx xxxx uuuu uuuu
111h
CM1CON0
C1ON
C1OUT
C1OE
C1POL
鈥�
C1SP
C1HYS
C1SYNC 0000 -100 0000 -100
112h
CM1CON1
C1INTP
C1INTN
C1PCH1
C1PCH0
鈥�
C1NCH<1:0>
0000 --00 0000 --00
113h
CM2CON0
C2ON
C2OUT
C2OE
C2POL
鈥�
C2SP
C2HYS
C2SYNC 0000 -100 0000 -100
114h
CM2CON1
C2INTP
C2INTN
C2PCH1
C2PCH0
鈥�
C2NCH<1:0>
0000 --00 0000 --00
115h
CMOUT
鈥�
MC3OUT MC2OUT MC1OUT ---- -000 ---- -000
116h
BORCON
SBOREN
鈥�
BORRDY 1--- ---q u--- ---u
117h
FVRCON
FVREN
FVRRDY
TSEN
TSRNG
CDAFVR1 CDAFVR0
ADFVR<1:0>
0q00 0000 0q00 0000
118h
DACCON0
DACEN
DACLPS
DACOE
鈥�
DACPSS<1:0>
鈥�
DACNSS 000- 00-0 000- 00-0
119h
DACCON1
鈥�
DACR<4:0>
---0 0000 ---0 0000
11Ah
SRCON0
SRLEN
SRCLK2
SRCLK1
SRCLK0
SRQEN
SRNQEN
SRPS
SRPR
0000 0000 0000 0000
11Bh
SRCON1
SRSPE
SRSCKE
SRSC2E
SRSC1E
SRRPE
SRRCKE
SRRC2E
SRRC1E 0000 0000 0000 0000
11Ch
鈥�
Unimplemented
鈥�
11Dh
APFCON
P3CSEL
P3BSEL
P2DSEL
P2CSEL
P2BSEL
CCP2SEL
P1CSEL
P1BSEL 0000 0000 0000 0000
11Eh
CM3CON0
C3ON
C3OUT
C3OE
C3POL
鈥�
C3SP
C3HYS
C3SYNC 0000 -100 0000 -100
11Fh
CM3CON1
C3INTP
C3INTN
C3PCH1
C3PCH0
鈥�
C3NCH<1:0>
0000 --00 0000 --00
TABLE 3-10:
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Legend:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as 鈥�0鈥�, r = reserved.
Shaded locations are unimplemented, read as 鈥�0鈥�.
Note
1:
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are
transferred to the upper byte of the program counter.
2:
These registers can be addressed from any bank.
3:
Unimplemented, read as 鈥�1鈥�.
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PIC16F1947T-I/MR 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 28KB1KB RAM 256B EEPROM RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿氱附绶氬搴�:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿� RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
PIC16F1947T-I/PT 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 28KB Flash, 1KB RAM LCD, 1.8-5.5V RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿氱附绶氬搴�:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿� RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
PIC16F505-E/MG 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 1.5KB 72 RAM 12 I/O Ext Temp QFN16 RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿氱附绶氬搴�:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿� RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
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