2010-2012 Microchip Technology Inc.
DS41414D-page 119
PIC16(L)F1946/47
EXAMPLE 11-5:
WRITING TO FLASH PROGRAM MEMORY
; This write routine assumes the following:
; 1. The 16 bytes of data are loaded, starting at the address in DATA_ADDR
; 2. Each word of data to be written is made up of two adjacent bytes in DATA_ADDR,
;
stored in little endian format
; 3. A valid starting address (the least significant bits = 000) is loaded in ADDRH:ADDRL
; 4. ADDRH and ADDRL are located in shared data memory 0x70 - 0x7F (common RAM)
;
BCF
INTCON,GIE
; Disable ints so required sequences will execute properly
BANKSEL
EEADRH
; Bank 3
MOVF
ADDRH,W
; Load initial address
MOVWF
EEADRH
;
MOVF
ADDRL,W
;
MOVWF
EEADRL
;
MOVLW
LOW DATA_ADDR
; Load initial data address
MOVWF
FSR0L
;
MOVLW
HIGH DATA_ADDR ; Load initial data address
MOVWF
FSR0H
;
BSF
EECON1,EEPGD
; Point to program memory
BCF
EECON1,CFGS
; Not configuration space
BSF
EECON1,WREN
; Enable writes
BSF
EECON1,LWLO
; Only Load Write Latches
LOOP
MOVIW
FSR0++
; Load first data byte into lower
MOVWF
EEDATL
;
MOVIW
FSR0++
; Load second data byte into upper
MOVWF
EEDATH
;
MOVF
EEADRL,W
; Check if lower bits of address are '000'
XORLW
0x07
; Check if we're on the last of 8 addresses
ANDLW
0x07
;
BTFSC
STATUS,Z
; Exit if last of eight words,
GOTO
START_WRITE
;
MOVLW
55h
; Start of required write sequence:
MOVWF
EECON2
; Write 55h
MOVLW
0AAh
;
MOVWF
EECON2
; Write AAh
BSF
EECON1,WR
; Set WR bit to begin write
NOP
; Any instructions here are ignored as processor
; halts to begin write sequence
NOP
; Processor will stop here and wait for write to complete.
; After write processor continues with 3rd instruction.
INCF
EEADRL,F
; Still loading latches Increment address
GOTO
LOOP
; Write next latches
START_WRITE
BCF
EECON1,LWLO
; No more loading latches - Actually start Flash program
; memory write
MOVLW
55h
; Start of required write sequence:
MOVWF
EECON2
; Write 55h
MOVLW
0AAh
;
MOVWF
EECON2
; Write AAh
BSF
EECON1,WR
; Set WR bit to begin write
NOP
; Any instructions here are ignored as processor
; halts to begin write sequence
NOP
; Processor will stop here and wait for write complete.
; after write processor continues with 3rd instruction
BCF
EECON1,WREN
; Disable writes
BSF
INTCON,GIE
; Enable interrupts
Required
S
equence
Required
Sequenc
e
