參數(shù)資料
型號(hào): PIC16F1827-I/SS
廠商: Microchip Technology
文件頁(yè)數(shù): 23/109頁(yè)
文件大小: 0K
描述: IC PIC MCU FLASH 4K 20-SSOP
產(chǎn)品培訓(xùn)模塊: 8-bit PIC® Microcontroller Portfolio
特色產(chǎn)品: Extreme Low Power (XLP) Microcontrollers
標(biāo)準(zhǔn)包裝: 67
系列: PIC® XLP™ mTouch™ 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 32MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 16
程序存儲(chǔ)器容量: 7KB(4K x 14)
程序存儲(chǔ)器類(lèi)型: 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量: 384 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 655 (CN2011-ZH PDF)
179
2570N–AVR–05/11
ATmega325/3250/645/6450
20.11 Register Description
20.11.1
UDRn – USART I/O Data Register n
The USART Transmit Data Buffer Register and USART Receive Data Buffer Registers share the
same I/O address referred to as USART Data Register or UDRn. The Transmit Data Buffer Reg-
ister (TXB) will be the destination for data written to the UDRn Register location. Reading the
UDRn Register location will return the contents of the Receive Data Buffer Register (RXB).
For 5-, 6-, or 7-bit characters the upper unused bits will be ignored by the Transmitter and set to
zero by the Receiver.
The transmit buffer can only be written when the UDREn Flag in the UCSRnA Register is set.
Data written to UDRn when the UDREn Flag is not set, will be ignored by the USART Transmit-
ter. When data is written to the transmit buffer, and the Transmitter is enabled, the Transmitter
will load the data into the Transmit Shift Register when the Shift Register is empty. Then the
data will be serially transmitted on the TxD pin.
Table 20-7.
Examples of UBRR Settings for Commonly Used Oscillator Frequencies (Continued)
Baud
Rate
(bps)
f
osc = 16.0000 MHz
f
osc = 18.4320 MHz
f
osc = 20.0000 MHz
U2Xn = 0U2Xn = 1
U2Xn = 0U2Xn = 1U2Xn = 0U2Xn = 1
UBRR
Error
UBRR
Error
UBRR
Error
UBRR
Error
UBRR
Error
UBRR
Error
2400
416
-0.1%
832
0.0%
479
0.0%
959
0.0%
520
0.0%
1041
0.0%
4800
207
0.2%
416
-0.1%
239
0.0%
479
0.0%
259
0.2%
520
0.0%
9600
103
0.2%
207
0.2%
119
0.0%
239
0.0%
129
0.2%
259
0.2%
14.4k
68
0.6%
138
-0.1%
79
0.0%
159
0.0%
86
-0.2%
173
-0.2%
19.2k
51
0.2%
103
0.2%
59
0.0%
119
0.0%
64
0.2%
129
0.2%
28.8k34
-0.8%68
0.6%
39
0.0%
79
0.0%
42
0.9%
86
-0.2%
38.4k
25
0.2%
51
0.2%
29
0.0%
59
0.0%
32
-1.4%
64
0.2%
57.6k
16
2.1%
34
-0.8%
19
0.0%
39
0.0%
21
-1.4%
42
0.9%
76.8k
12
0.2%
25
0.2%
14
0.0%
29
0.0%
15
1.7%
32
-1.4%
115.2k
8
-3.5%
16
2.1%
90.0%
19
0.0%
10
-1.4%
21
-1.4%
230.4k
3
8.5%
8
-3.5%
4
0.0%
9
0.0%
4
8.5%
10
-1.4%
250k
3
0.0%
7
0.0%
4-7.8%
8
2.4%
40.0%9
0.0%
0.5M
1
0.0%
3
0.0%
––
4
-7.8%
––4
0.0%
1M
0
0.0%
1
0.0%
–––
Max. (1)
1 Mbps
2 Mbps
1.152 Mbps
2.304 Mbps
1.25 Mbps
2.5 Mbps
1.
UBRR = 0, Error = 0.0%
Bit
765
43210
RXB[7:0]
UDRn (Read)
TXB[7:0]
UDRn (Write)
Read/Write
R/W
Initial Value
000
00000
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