MCLR/V
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� PIC16CR76T-I/SS
寤犲晢锛� Microchip Technology
鏂囦欢闋佹暩(sh霉)锛� 18/172闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC PIC MCU 8KX14 28SSOP
妯欐簴鍖呰锛� 2,100
绯诲垪锛� PIC® 16C
鏍稿績铏曠悊鍣細 PIC
鑺珨灏哄锛� 8-浣�
閫熷害锛� 20MHz
閫ｉ€氭€э細 I²C锛孲PI锛孶ART/USART
澶栧湇瑷倷锛� 娆犲妾㈡脯/寰╀綅锛孭OR锛孭WM锛學DT
杓稿叆/杓稿嚭鏁�(sh霉)锛� 22
绋嬪簭瀛樺劜鍣ㄥ閲忥細 14KB锛�8K x 14锛�
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 ROM
RAM 瀹归噺锛� 368 x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 2 V ~ 5.5 V
鏁�(sh霉)鎿�(j霉)杞夋彌鍣細 A/D 5x8b
鎸暕鍣ㄥ瀷锛� 鍏ч儴
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 28-SSOP锛�0.209"锛�5.30mm 瀵級
鍖呰锛� 甯跺嵎 (TR)
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PIC18F2220/2320/4220/4320
DS39599G-page 112
2007 Microchip Technology Inc.
FIGURE 10-14:
BLOCK DIAGRAM OF
MCLR/VPP/RE3 PIN
MCLR/VPP/
Data Bus
RD PORTE
RD LATE
Schmitt
Trigger
MCLRE
RD TRISE
QD
EN
Latch
Filter
Low-Level
MCLR Detect
High-Voltage Detect
Internal MCLR
HV
RE3
REGISTER 10-1:
TRISE REGISTER
R-0
R/W-0
U-0
R/W-1
IBF
OBF
IBOV
PSPMODE
鈥�
TRISE2
TRISE1
TRISE0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as 鈥�0鈥�
-n = Value at POR
鈥�1鈥� = Bit is set
鈥�0鈥� = Bit is cleared
x = Bit is unknown
bit 7
IBF: Input Buffer Full Status bit
1 = A word has been received and waiting to be read by the CPU
0 = No word has been received
bit 6
OBF: Output Buffer Full Status bit
1 = The output buffer still holds a previously written word
0 = The output buffer has been read
bit 5
IBOV: Input Buffer Overflow Detect bit (in Microprocessor mode)
1 = A write occurred when a previously input word has not been read (must be cleared in software)
0 = No overflow occurred
bit 4
PSPMODE: Parallel Slave Port Mode Select bit
1 = Parallel Slave Port mode
0 = General Purpose I/O mode
bit 3
Unimplemented: Read as 鈥�0鈥�
bit 2
TRISE2: RE2 Direction Control bit
1 = Input
0 = Output
bit 1
TRISE1: RE1 Direction Control bit
1 = Input
0 = Output
bit 0
TRISE0: RE0 Direction Control bit
1 = Input
0 = Output
鐩搁棞PDF璩囨枡
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PIC16CR77-I/P 鍔熻兘鎻忚堪:IC PIC MCU 8KX14 40DIP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - 寰帶鍒跺櫒锛� 绯诲垪:PIC® 16C 鐢㈠搧鍩硅〒妯″:Asynchronous Stimulus 8-bit PIC® Microcontroller Portfolio 妯欐簴鍖呰:42 绯诲垪:PIC® 16C 鏍稿績铏曠悊鍣�:PIC 鑺珨灏哄:8-浣� 閫熷害:20MHz 閫ｉ€氭€�:- 澶栧湇瑷倷:娆犲妾㈡脯/寰╀綅锛孭OR锛孭WM锛學DT 杓稿叆/杓稿嚭鏁�(sh霉):13 绋嬪簭瀛樺劜鍣ㄥ閲�:3.5KB锛�2K x 14锛� 绋嬪簭瀛樺劜鍣ㄩ鍨�:OTP EEPROM 澶у皬:- RAM 瀹归噺:128 x 8 闆诲 - 闆绘簮 (Vcc/Vdd):4 V ~ 5.5 V 鏁�(sh霉)鎿�(j霉)杞夋彌鍣�:A/D 4x8b 鎸暕鍣ㄥ瀷:澶栭儴 宸ヤ綔婧害:-40°C ~ 85°C 灏佽/澶栨:18-SOIC锛�0.295"锛�7.50mm 瀵級 鍖呰:绠′欢 閰嶇敤:XLT18SO-1-ND - SOCKET TRANSITION 18SOIC 300MILISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING309-1011-ND - ADAPTER 18-SOIC TO 18-DIP309-1010-ND - ADAPTER 18-SOIC TO 18-DIPAC164010-ND - MODULE SKT PROMATEII DIP/SOIC
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