
1999 Microchip Technology Inc.
DS40182C-page 53
PIC16CE62X
10.3
Reset
The PIC16CE62X differentiates between various kinds
of reset:
a)
Power-on reset (POR)
b)
MCLR reset during normal operation
c)
MCLR reset during SLEEP
d)
WDT reset (normal operation)
e)
WDT wake-up (SLEEP)
f)
Brown-out Reset (BOD)
Some registers are not affected in any reset condition.
Their status is unknown on POR and unchanged in any
other reset. Most other registers are reset to a “reset
state” on Power-on reset, MCLR reset, WDT reset and
MCLR reset during SLEEP. They are not affected by a
WDT wake-up, since this is viewed as the resumption
of normal operation. TO and PD bits are set or cleared
differently in different reset situations as indicated in
mine the nature of the reset. See
Table 10-6 for a full
description of reset states of all registers.
A simplified block diagram of the on-chip reset circuit is
The MCLR reset path has a noise filter to detect and
ignore small pulses. See
Table 13-5 for pulse width
specification.
FIGURE 10-6: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
S
R
Q
External
Reset
MCLR/
VDD
OSC1/
WDT
Module
VDD rise
detect
OST/PWRT
On-chip(1)
RC OSC
WDT
Time-out
Power-on Reset
OST
PWRT
Chip_Reset
10-bit Ripple-counter
Reset
Enable OST
Enable PWRT
SLEEP
Note 1:
This is a separate oscillator from the RC oscillator of the CLKIN pin.
Brown-out
Reset
BODEN
CLKIN
Pin
VPP Pin
10-bit Ripple-counter