參數(shù)資料
型號： PIC16C72A-04I/SS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO28
封裝： 0.209 INCH, PLASTIC, MS-150, SSOP-28
文件頁數(shù)： 20/34頁
文件大?。?/td> 2123K
代理商： PIC16C72A-04I/SS
PIC16C62B/72A
1999 Microchip Technology Inc.
Preliminary
DS35008B-page 27
5.0
TIMER1 MODULE
The Timer1 module timer/counter has the following fea-
tures:
16-bit timer/counter
Readable and writable
Internal or external clock select
Interrupt on overflow from FFFFh to 0000h
Reset from CCP module trigger
Timer1 has a control register, shown in Register 5-1.
Timer1 can be enabled/disabled by setting/clearing
control bit TMR1ON (T1CON<0>).
Figure 5-1 is a simplified block diagram of the Timer1
module.
Additional information on timer modules is available in
the
PICmicro
Mid-Range
Reference
Manual,
(DS33023).
5.1
Timer1 Operation
Timer1 can operate in one of these modes:
As a timer
As a synchronous counter
As an asynchronous counter
The operating mode is determined by the clock select
bit, TMR1CS (T1CON<1>).
In timer mode, Timer1 increments every instruction
cycle.
In counter mode, it increments on every rising
edge of the external clock input.
When the Timer1 oscillator is enabled (T1OSCEN is
set), the RC1/T1OSI and RC0/T1OSO/T1CKI pins
become inputs. That is, the TRISC<1:0> value is
ignored.
Timer1 also has an internal “reset input”. This reset can
be generated by the CCP module as a special event
REGISTER 5-1:T1CON: TIMER1 CONTROL REGISTER (ADDRESS 10h)
U-0
R/W-0
—
T1CKPS1 T1CKPS0 T1OSCEN
T1SYNC
TMR1CS TMR1ON
R
= Readable bit
W = Writable bit
U
= Unimplemented bit,
read as ‘0’
- n = Value at POR reset
bit7
bit0
bit 7-6:
Unimplemented: Read as ’0’
bit 5-4: T1CKPS1:T1CKPS0: Timer1 Input Clock Prescale Select bits
11
= 1:8 Prescale value
10
= 1:4 Prescale value
01
= 1:2 Prescale value
00
= 1:1 Prescale value
bit 3:
T1OSCEN: Timer1 Oscillator Enable Control bit
1
= Oscillator is enabled (TRISC<1:0> ignored)
0
= Oscillator is shut off
(The oscillator is turned off to reduce power drain
bit 2:
T1SYNC: Timer1 External Clock Input Synchronization Control bit
TMR1CS = 1
1
= Do not synchronize external clock input
0
= Synchronize external clock input
TMR1CS = 0
This bit is ignored. Timer1 uses the internal clock when TMR1CS = 0.
bit 1:
TMR1CS: Timer1 Clock Source Select bit
1
= External clock from pin RC0/T1OSO/T1CKI (on the rising edge)
0
= Internal clock (FOSC/4)
bit 0:
TMR1ON: Timer1 On bit
1
= Enables Timer1
0
= Stops Timer1
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