參數(shù)資料
型號: PIC16C620A-04/P301
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDIP18
封裝: 0.300 INCH, PLASTIC, DIP-18
文件頁數(shù): 42/108頁
文件大?。?/td> 674K
代理商: PIC16C620A-04/P301
1998 Microchip Technology Inc.
Preliminary
DS30235G-page 39
PIC16C62X
The code example in Example 7-1 depicts the steps
required to congure the comparator module. RA3 and
RA4 are congured as digital output. RA0 and RA1 are
congured as the V- inputs and RA2 as the V+ input to
both comparators.
EXAMPLE 7-1:
INITIALIZING
COMPARATOR MODULE
7.2
Comparator Operation
A single comparator is shown in Figure 7-3 along with
the relationship between the analog input levels and
the digital output. When the analog input at VIN+ is less
than the analog input VIN–, the output of the
comparator is a digital low level. When the analog input
at VIN+ is greater than the analog input VIN–, the output
of the comparator is a digital high level. The shaded
areas of the output of the comparator in Figure 7-3
represent the uncertainty due to input offsets and
response time.
FLAG_REG
EQU
0X20
CLRF
FLAG_REG
;Init flag register
CLRF
PORTA
;Init PORTA
MOVF
CMCON, W
;Load comparator bits
ANDLW
0xC0
;Mask comparator bits
IORWF
FLAG_REG,F
;Store bits in flag register
MOVLW
0x03
;Init comparator mode
MOVWF
CMCON
;CM<2:0> = 011
BSF
STATUS,RP0
;Select Bank1
MOVLW
0x07
;Initialize data direction
MOVWF
TRISA
;Set RA<2:0> as inputs
;RA<4:3> as outputs
;TRISA<7:5> always read ‘0’
BCF
STATUS,RP0
;Select Bank 0
CALL
DELAY 10
;10
s delay
MOVF
CMCON,F
;Read CMCON to end change condition
BCF
PIR1,CMIF
;Clear pending interrupts
BSF
STATUS,RP0
;Select Bank 1
BSF
PIE1,CMIE
;Enable comparator interrupts
BCF
STATUS,RP0
;Select Bank 0
BSF
INTCON,PEIE
;Enable peripheral interrupts
BSF
INTCON,GIE
;Global interrupt enable
7.3
Comparator Reference
An external or internal reference signal may be used
depending on the comparator operating mode. The
analog signal that is present at VIN– is compared to the
signal at VIN+, and the digital output of the comparator
is adjusted accordingly (Figure 7-3).
FIGURE 7-3:
SINGLE COMPARATOR
7.3.1
EXTERNAL REFERENCE SIGNAL
When external voltage references are used, the
comparator module can be congured to have the com-
parators operate from the same or different reference
sources. However, threshold detector applications may
require the same reference. The reference signal must
be between VSS and VDD, and can be applied to either
pin of the comparator(s).
7.3.2
INTERNAL REFERENCE SIGNAL
The comparator module also allows the selection of an
internally
generated
voltage
reference
for
the
comparators. Section 13, Instruction Sets, contains a
detailed description of the Voltage Reference Module
that provides this signal. The internal reference signal
is
used
when
the
comparators
are
in
mode
CM<2:0>=010 (Figure 7-2). In this mode, the internal
voltage reference is applied to the VIN+ pin of both com-
parators.
+
VIN+
VIN
Output
VIN–
VIN+
Output
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