
1997 Microchip Technology Inc.
Preliminary
DS30453A-page 209
PIC16C5X
Figure 7-8:
Simplified Block Diagram of On-Chip
Reset Circuit...............................................36
External Power-On Reset Circuit
(For Slow V
DD
Power-Up)...........................37
Time-Out Sequence on Power-Up
(MCLR Not Tied to V
DD
).............................38
Time-Out Sequence on Power-Up
(MCLR Tied to V
DD
): Fast V
DD
Rise Time....................................................38
Time-Out Sequence on Power-Up
(MCLR Tied to V
DD
): Slow V
DD
Rise Time....................................................38
Watchdog Timer Block Diagram.................40
Brown-Out Protection Circuit 1...................41
Brown-Out Protection Circuit 2...................41
General Format for Instructions..................43
Load Conditions - PIC16C52......................62
External Clock Timing - PIC16C52.............63
CLKOUT and I/O Timing - PIC16C52.........64
Reset and Device Reset Timer Timing -
PIC16C52...................................................65
Timer0 Clock Timings - PIC16C52.............66
Load Conditions - PIC16C54/55/56/57.......74
External Clock Timing -
PIC16C54/55/56/57....................................75
CLKOUT and I/O Timing -
PIC16C54/55/56/57....................................77
Reset, Watchdog Timer, and
Device Reset Timer Timing -
PIC16C54/55/56/57....................................78
Timer0 Clock Timings -
PIC16C54/55/56/57....................................79
Typical RC Oscillator Frequency vs.
Temperature...............................................81
Typical RC Oscillator Frequency vs.
V
DD
, C
EXT
= 20
P
F......................................82
Typical RC Oscillator Frequency vs.
V
DD
, C
EXT
= 100
P
F....................................82
Typical RC Oscillator Frequency vs.
V
DD
, C
EXT
= 300
P
F....................................82
Typical I
PD
vs. V
DD
, Watchdog Disabled....83
Maximum I
PD
vs. V
DD
,
Watchdog Disabled.....................................83
Typical I
PD
vs. V
DD
, Watchdog Enabled.....83
Maximum I
PD
vs. V
DD
,
Watchdog Enabled .....................................83
V
TH
(Input Threshold Voltage) of
I/O Pins vs. V
DD
..........................................84
Figure 12-10: V
IH
, V
IL
of MCLR, T0CKI and OSC1
(in RC Mode) vs. V
DD
.................................84
Figure 12-11: V
TH
(Input Threshold Voltage) of
OSC1 Input (in XT, HS, and LP modes)
vs. V
DD
........................................................84
Figure 12-12: Typical I
DD
vs. Frequency
(External Clock, 25
°
C)................................85
Figure 12-13: Maximum I
DD
vs. Frequency
(External Clock, –40
°
C to +85
°
C)...............85
Figure 12-14: Maximum I
DD
vs. Frequency
(External Clock –55
°
C to +125
°
C)..............86
Figure 12-15: WDT Timer Time-out Period vs. V
DD
..........86
Figure 12-16: Transconductance (gm) of
HS Oscillator vs. V
DD
..................................86
Figure 12-17: Transconductance (gm) of
LP Oscillator vs. V
DD
..................................87
Figure 12-18: I
OH
vs. V
OH
, V
DD
= 3 V...............................87
Figure 7-9:
Figure 7-10:
Figure 7-11:
Figure 7-12:
Figure 7-13:
Figure 7-14:
Figure 7-15:
Figure 8-1:
Figure 10-1:
Figure 10-2:
Figure 10-3:
Figure 10-4:
Figure 10-5:
Figure 11-1:
Figure 11-2:
Figure 11-3:
Figure 11-4:
Figure 11-5:
Figure 12-1:
Figure 12-2:
Figure 12-3:
Figure 12-4:
Figure 12-5:
Figure 12-6:
Figure 12-7:
Figure 12-8:
Figure 12-9:
Figure 12-19: Transconductance (gm) of
XT Oscillator vs. V
DD
...................................87
Figure 12-20: I
OH
vs. V
OH
, V
DD
= 5 V................................87
Figure 12-21: I
OL
vs. V
OL
, V
DD
= 3 V.................................88
Figure 12-22: I
OL
vs. V
OL
, V
DD
= 5 V.................................88
Figure 13-1:
Load Conditions ..........................................96
Figure 13-2:
External Clock Timing - PIC16CR54A.........97
Figure 13-3:
CLKOUT and I/O Timing - PIC16CR54A ....99
Figure 13-4:
Reset, Watchdog Timer, and Device
Reset Timer Timing - PIC16CR54A......... 100
Figure 13-5:
Timer0 Clock Timings - PIC16CR54A...... 101
Figure 14-1:
Load Conditions - PIC16C54A................. 110
Figure 14-2:
External Clock Timing - PIC16C54A........ 111
Figure 14-3:
CLKOUT and I/O Timing - PIC16C54A.... 113
Figure 14-4:
Reset, Watchdog Timer, and
Device Reset Timer Timing -
PIC16C54A .............................................. 114
Figure 14-5:
Timer0 Clock Timings - PIC16C54A ........ 115
Figure 15-1:
Load Conditions ....................................... 124
Figure 15-2:
External Clock Timing - PIC16CR57B...... 125
Figure 15-3:
CLKOUT and I/O Timing -
PIC16CR57B............................................ 127
Figure 15-4:
Reset, Watchdog Timer, and Device
Reset Timer Timing - PIC16CR57B......... 128
Figure 15-5:
Timer0 Clock Timings - PIC16CR57B...... 129
Figure 16-1:
Load Conditions - PIC16C58A,
PIC16LV58A............................................. 138
Figure 16-2:
External Clock Timing - PIC16C58A........ 139
Figure 16-3:
CLKOUT and I/O Timing - PIC16C58A.... 141
Figure 16-4:
Reset, Watchdog Timer, and
Device Reset Timer Timing -
PIC16C58A .............................................. 142
Figure 16-5:
Timer0 Clock Timings - PIC16C58A ........ 143
Figure 17-1:
Load Conditions - PIC16CR58A............... 152
Figure 17-2:
External Clock Timing - PIC16CR58A...... 153
Figure 17-3:
CLKOUT and I/O Timing -
PIC16CR58A............................................ 155
Figure 17-4:
Reset, Watchdog Timer, and
Device Reset Timer Timing -
PIC16CR58A............................................ 156
Figure 17-5:
Timer0 Clock Timings - PIC16CR58A...... 157
Figure 18-1:
Typical RC Oscillator Frequency vs.
Temperature............................................. 159
Figure 18-2:
Typical RC Oscillator Frequency vs.
V
DD
, C
EXT
= 20
P
F ................................... 160
Figure 18-3:
Typical RC Oscillator Frequency vs.
V
DD
, C
EXT
= 100
P
F ................................. 160
Figure 18-4:
Typical RC Oscillator Frequency vs.
V
DD
, C
EXT
= 300
P
F ................................. 161
Figure 18-5:
Typical I
PD
vs. V
DD
, Watchdog
Disabled (25
°
C)........................................ 161
Figure 18-6:
Typical I
PD
vs. V
DD
, Watchdog
Enabled (25
°
C)......................................... 162
Figure 18-7:
V
TH
(Input Threshold Voltage) of
I/O Pins vs. V
DD
....................................... 162
Figure 18-8:
V
IH
, V
IL
of MCLR, T0CKI and OSC1
(in RC Mode) vs. V
DD
............................... 163
Figure 18-9:
V
TH
(Input Threshold Voltage) of
OSC1 Input (in XT, HS, and LP modes)
vs. V
DD
..................................................... 163
Figure 18-10: Typical I
DD
vs. Frequency
(WDT dis, RC Mode @ 20
P
F, 25
°
C)....... 164
Figure 18-11: Maximum I
DD
vs. Frequency
(WDT Dis, RC Mode @ 20
P
F,
–40
°
C to +85
°
C)....................................... 164