PIC18F2450/4450
2006 Microchip Technology Inc.
Advance Information
DS39760A-page 95
REGISTER 8-9:
IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
R/W-1
U-0
R/W-1
U-0
R/W-1
U-0
OSCFIP
—
USBIP
—
—HLVDIP
—
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
OSCFIP: Oscillator Fail Interrupt Priority bit
1
= High priority
0
= Low priority
bit 6
Unimplemented: Read as ‘0’
bit 5
USBIP: USB Interrupt Priority bit
1
= High priority
0
= Low priority
bit 4-3
Unimplemented: Read as ‘0’
bit 2
HLVDIP: High/Low-Voltage Detect Interrupt Priority bit
1
= High priority
0
= Low priority
bit 1-0
Unimplemented: Read as ‘0’