
1996 Microchip Technology Inc.
Preliminary
DS40143A-page 97
PIC16C55X
List of Examples
Example 3-1:
Example 4-1:
Example 5-1:
Instruction Pipeline Flow...........................10
Indirect Addressing ...................................20
Read-Modify-Write Instructions
on an I/O Port............................................25
Changing Prescaler (Timer0
Changing Prescaler (WDT
Saving the Status and W Registers
in RAM ......................................................45
Example 6-1:
Example 6-2:
Example 7-1:
→
Timer0)........31
WDT)........31
→
List of Figures
Figure 3-1:
Figure 3-2:
Figure 4-1:
Block Diagram.............................................8
Clock/Instruction Cycle..............................10
Program Memory Map and Stack for the
PIC16C554................................................11
Program Memory Map and Stack for the
PIC16C556................................................11
Program Memory Map and Stack for the
PIC16C558................................................11
Data Memory Map for the
PIC16C554/556.........................................13
Data Memory Map for the PIC16C558......13
STATUS Register (Address 03h or 83h)...15
OPTION Register (Address 81h) ..............16
INTCON Register (Address 0Bh or 8Bh) ..17
PCON Register (Address 8Eh) .................18
Loading Of PC In Different Situations.......19
Direct/Indirect Addressing PIC16C55X.....20
Block Diagram of RA<3:0>........................21
Block Diagram of RA4 Pin.........................21
Block Diagram of RB7:RB4 Pins...............23
Block Diagram of RB3:RB0 Pins...............23
Successive I/O Operation .........................25
TIMER0 Block Diagram.............................27
TIMER0 (TMR0) Timing: Internal
Clock/No Prescaler ...................................27
TIMER0 Timing: Internal
Clock/Prescale 1:2....................................28
TIMER0 Interrupt Timing...........................28
TIMER0 Timing With External Clock.........29
Block Diagram of the Timer0/WDT
Prescaler...................................................30
Configuration Word...................................34
Crystal Operation (or Ceramic Resonator)
(HS, XT or LP Osc Configuration).............35
External Clock Input Operation
(HS, XT or LP Osc Configuration).............35
External Parallel Resonant Crystal
Oscillator Circuit........................................36
External Series Resonant Crystal
Oscillator Circuit........................................36
RC Oscillator Mode...................................36
Simplified Block Diagram of On-chip
Reset Circuit..............................................37
Time-out Sequence on Power-up
(MCLR not tied to V
DD
Time-out Sequence on Power-up
(MCLR not tied to V
DD
Time-out Sequence on Power-up
(MCLR tied to V
DD
)...................................41
External Power-on Reset Circuit
(For Slow V
DD
Power-up)..........................42
Interrupt Logic...........................................43
INT Pin Interrupt Timing............................44
Figure 4-2:
Figure 4-3:
Figure 4-4:
Figure 4-5:
Figure 4-6:
Figure 4-7:
Figure 4-8:
Figure 4-9:
Figure 4-10:
Figure 4-11:
Figure 5-1:
Figure 5-2:
Figure 5-3:
Figure 5-4:
Figure 5-5:
Figure 6-1:
Figure 6-2:
Figure 6-3:
Figure 6-4:
Figure 6-5:
Figure 6-6:
Figure 7-1:
Figure 7-2:
Figure 7-3:
Figure 7-4:
Figure 7-5:
Figure 7-6:
Figure 7-7:
Figure 7-8:
): Case 1................41
Figure 7-9:
): Case 2................41
Figure 7-10:
Figure 7-11:
Figure 7-12:
Figure 7-13:
Figure 7-14:
Figure 7-15:
Figure 7-16:
Figure 7-17:
Watchdog Timer Block Diagram................46
Summary of Watchdog Timer Registers....46
Wake-up from Sleep Through Interrupt.....47
Typical In-Circuit Serial Programming
Connection.................................................48
General Format for Instructions.................49
PICMASTER System Configuration ..........61
Load Conditions.........................................72
External Clock Timing................................73
CLKOUT and I/O Timing............................74
Reset, Watchdog Timer, Oscillator
Start-Up Timer and Power-Up Timer
Timing........................................................75
TIMER0 Clock Timing................................76
Load Conditions.........................................76
Figure 8-1:
Figure 9-1:
Figure 10-1:
Figure 10-2:
Figure 10-3:
Figure 10-4:
Figure 10-5:
Figure 10-6:
List of Tables
Table 1-1:
Table 3-1:
Table 4-1:
Table 5-1:
Table 5-2:
PIC16C55X Family of Devices ....................4
PIC16C55X Pinout Description....................9
Special Registers for the PIC16C55X........14
PORTA Functions......................................22
Summary of Registers Associated with
PORTA ......................................................22
PORTB Functions......................................24
Summary of Registers Associated with
PORTB ......................................................24
Registers Associated with Timer0 .............31
Capacitor Selection for Ceramic
Resonators (Preliminary)...........................35
Capacitor Selection for Crystal
Oscillator (Preliminary) ..............................35
Time-out in Various Situations...................39
Status Bits and Their Significance.............39
Initialization Condition for Special
Registers....................................................40
Initialization Condition for Registers ..........40
OPCODE Field Descriptions......................49
PIC16C55X Instruction Set........................50
PICMASTER System Configuration ..........62
Development System Packages................65
Cross Reference of Device Specs for
Oscillator Configurations and Frequencies
of Operation (Commercial Devices)...........67
External Clock Timing Requirements ........73
CLKOUT and I/O Timing Requirements....74
Reset, Watchdog Timer, Oscillator
Start-up Timer and Power-up Timer
Requirements ............................................75
TIMER0 Clock Requirements....................76
Table 5-3:
Table 5-4:
Table 6-1:
Table 7-1:
Table 7-2:
Table 7-3:
Table 7-4:
Table 7-5:
Table 7-6:
Table 8-1:
Table 8-2:
Table 9-1:
Table 9-2:
Table 10-1:
Table 10-2:
Table 10-3:
Table 10-4:
Table 10-5: