參數(shù)資料
型號(hào): PIC16C432T-I/SS
廠商: Microchip Technology
文件頁數(shù): 47/70頁
文件大小: 0K
描述: IC MCU CMOS 8BIT 20MHZ 2K 20SSOP
標(biāo)準(zhǔn)包裝: 1,600
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: LIN(本地互連網(wǎng)絡(luò))
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,WDT
輸入/輸出數(shù): 12
程序存儲(chǔ)器容量: 3.5KB(2K x 14)
程序存儲(chǔ)器類型: OTP
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
包裝: 帶卷 (TR)
配用: AC164029-ND - MODULE SKT PROMATEII 20DIP/SSOP
2002 Microchip Technology Inc.
Preliminary
DS41140B-page 49
PIC16C432
9.4.5
TIMEOUT SEQUENCE
On power-up, the timeout sequence is as follows: First
PWRT timeout is invoked after POR has expired, then
OST is activated. The total timeout will vary based on
oscillator configuration and PWRTE bit status. For
example, in RC mode with PWRTE bit erased (PWRT
disabled), there will be no timeout at all. Figure 9-8,
Figure 9-8 and Figure 9-9 depict timeout sequences.
Since the timeouts occur from the POR pulse, if MCLR
is kept low long enough, the timeouts will expire. Then
bringing MCLR high will begin execution immediately
(see Figure 9-8). This is useful for testing purposes or
to synchronize more than one PICmicro device oper-
ating in parallel.
Table 9-5 shows the RESET conditions for some spe-
cial registers, while Table 9-6 shows the RESET condi-
tions for all the registers.
9.4.6
POWER CONTROL (PCON)/STATUS
REGISTER
The power control/status register, PCON (address
8Eh), has two bits.
Bit0 is BOR (Brown-out). BOR is unknown on Power-
on Reset. It must then be set by the user and checked
on subsequent RESETS to see if BOR = 0, indicating
that a brown-out has occurred. The BOR status bit is a
“don’t care” and is not necessarily predictable if the
brown-out circuit is disabled (by setting BODEN bit = 0
in the Configuration word).
Bit1 is POR (Power-on Reset). It is a ‘0’ on Power-on
Reset and unaffected otherwise. The user must write a
‘1’ to this bit following a Power-on Reset. On a subse-
quent RESET, if POR is ‘0’, it will indicate that a Power-
on Reset must have occurred (VDD may have gone too
low).
TABLE 9-3:
TIMEOUT IN VARIOUS SITUATIONS
TABLE 9-4:
STATUS/PCON BITS AND THEIR SIGNIFICANCE
Oscillator Configuration
Power-up
Brown-out Reset
Wake-up
from SLEEP
PWRTE = 0
PWRTE = 1
XT, HS, LP
72 ms + 1024 TOSC
1024 TOSC
72 ms + 1024 TOSC
1024 TOSC
RC
72 ms
72 ms
POR
BOR
TO
PD
0X11
Power-on Reset
0X0X
Illegal, TO is set on POR
0XX0
Illegal, PD is set on POR
10XX
Brown-out Reset
110u
WDT Reset
1100
WDT Wake-up
11uu
MCLR Reset during normal operation
1110
MCLR Reset during SLEEP
Legend: x = unknown, u = unchanged
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