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參數(shù)資料
| 型號(hào)： | PIC12F635-E/SN |
| 廠商： | Microchip Technology |
| 文件頁(yè)數(shù)： | 35/74頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU FLASH 1KX14 8SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Asynchronous Stimulus |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 系列： | PIC® 12F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，POR，WDT |
| 輸入/輸出數(shù)： | 5 |
| 程序存儲(chǔ)器容量： | 1.75KB（1K x 14） |
| 程序存儲(chǔ)器類型： | 閃存 |
| EEPROM 大?。?/td> | 128 x 8 |
| RAM 容量： | 64 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 包裝： | 管件 |
| 配用： | AC162057-ND - MPLAB ICD 2 HEADER 14DIP |
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Micrel, Inc.
KSZ8841-PMQL
October 2007
40
M9999-100407-1.5
MAC Multicast Table 1 Register (MTR1 Offset 0x0024)
The 64 bit multicast table is used for group address filtering. The value is defined as the six most significant bits of the
CRC of the DA. The two most significant bits select the register to be used, while the other determines the bit within the
register.
Bit
Default
Read/
Write
Description
31-0
0x00000000
RW
MTR0 Multicast Table 1
When appropriate bit is set, the packet received with DA matches the
CRC hashing function is received without being filtered.
Note: when receive all (RXRA) or receive multicast (RXRM) bit is set in
the RXCR then all multicast addresses are received regardless of the
multicast table value.
Interrupt Enable Register (INTEN Offset 0x0028)
This register enables the interrupts from the internal or external sources.
The following table shows the register bit fields.
Bit
Default
Read/
Write
Description
31
0
RW
DMLCIE DMA MAC Link Changed Interrupt Enable
When this bit is set, the DMA MAC Link Changed Interrupt is enabled.
When this bit is reset, the DMA MAC Link Changed Interrupt is
disabled.
30
0
RW
DMTIE DMA MAC Transmit Interrupt Enable
When this bit is set, the DMA MAC Transmit Interrupt is enabled.
When this bit is reset, the DMA MAC Transmit Interrupt is disabled.
29
0
RW
DMRIE DMA MAC Receive Interrupt Enable
When this bit is set, the DMA MAC Receive Interrupt is enabled.
When this bit is reset, the DMA MAC Receive Interrupt is disabled.
28
0
RW
DMTBUIE DMA MAC Transmit Buffer Unavailable Interrupt Enable
When this bit is set, the DMA MAC Transmit Buffer Unavailable
Interrupt is enabled.
When this bit is reset, the DMA MAC Transmit Buffer Unavailable
Interrupt is disabled.
27
0
RW
DMRBUIE DMA MAC Receive Buffer Unavailable Interrupt Enable
When this bit is set, the DMA MAC Receive Buffer Unavailable Interrupt
is enabled.
When this bit is reset, the DMA MAC Receive Buffer Unavailable
Interrupt is disabled.
26
0
RW
DMTPSIE DMA MAC Transmit Process Stopped Interrupt Enable
When this bit is set, the DMA MAC Transmit Process Stopped Interrupt
is enabled.
When this bit is reset, the DMA MAC Transmit Process Stopped
Interrupt is disabled.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PIC12F635-I/MD | 功能描述:8位微控制器 -MCU 2 KB 64 RAM 6I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC12F635-I/MDQTP | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:8/14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology |
| PIC12F635I/MF | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:8/14-PIN FLASH-BASED, 8-BIT CMOS MICROCONTROLLERS WITH NANOWATT TECHNOLOGY |
| PIC12F635-I/MF | 功能描述:8位微控制器 -MCU 2kb 64 RAM 6 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC12F635-I/MF | 制造商:Microchip Technology Inc 功能描述:8BIT FLASH MCU SMD 12F635 DFN-8 |
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