VOH
參數(shù)資料
型號(hào)： PIC12CE674-04I/P
廠商： Microchip Technology
文件頁數(shù)： 126/129頁
文件大?。?/td> 0K
描述： IC MCU OTP 2KX14 A/D&EE 8DIP
產(chǎn)品培訓(xùn)模塊： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝： 60
系列： PIC® 12C
核心處理器： PIC
芯體尺寸： 8-位
速度： 4MHz
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 5
程序存儲(chǔ)器容量： 3.5KB（2K x 14）
程序存儲(chǔ)器類型： OTP
EEPROM 大小： 16 x 8
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 8-DIP（0.300"，7.62mm）
包裝： 管件
配用： ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC
其它名稱： Q637727
PIC12C67X
DS30561B-page 96
1999 Microchip Technology Inc.
Output High Voltage
D090
I/O ports (Note 3)
VOH
VDD - 0.7
——
VIOH = -3.0 mA, VDD = 4.5V,
–40
°C to +85°C
D090A
VDD - 0.7
——
VIOH = -2.5 mA, VDD = 4.5V,
–40
°C to +125°C
D092
OSC2/CLKOUT
VDD - 0.7
—
V
IOH = 1.3 mA, VDD = 4.5V,
–40
°C to +85°C
D092A
VDD - 0.7
—
V
IOH = 1.0 mA, VDD = 4.5V,
–40
°C to +125°C
Capacitive Loading Specs on
Output Pins
D100
OSC2 pin
COSC2
——
15
pF
In XT and LP modes when
external clock is used to drive
OSC1.
D101
All I/O pins
CIO
——
50
pF
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise specified)
Operating temperature
0°C
≤ TA ≤ +70°C (commercial)
–40°C
≤ TA ≤ +85°C (industrial)
–40°C
≤ TA ≤ +125°C (extended)
Operating voltage VDD range as described in DC spec Section 12.1 and
Section 12.2.
Param
No.
Characteristic
Sym
Min
Typ
Max
Units
Conditions
Data in “Typ” column is at 5V, 25
°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1:
In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the PIC12C67X
be driven with external clock in RC mode.
2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent
normal operating conditions. Higher leakage current may be measured at different input voltages.
3: Negative current is defined as coming out of the pin.
4: Does not include GP3. For GP3 see parameters D061 and D061A.
5: This spec. applies to GP3/MCLR configured as external MCLR and GP3/MCLR configured as input with internal pull-up
enabled.
6: This spec. applies when GP3/MCLR is configured as an input with pull-up disabled. The leakage current of the MCLR circuit
is higher than the standard I/O logic.
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參數(shù)描述
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