參數(shù)資料
型號(hào)： PIC12CE519-04/SM
廠商： Microchip Technology
文件頁數(shù)： 21/113頁
文件大?。?/td> 0K
描述： IC MCU OTP 1KX12 W/EE 8-SOIJ
產(chǎn)品培訓(xùn)模塊： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝： 90
系列： PIC® 12C
核心處理器： PIC
芯體尺寸： 8-位
速度： 4MHz
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 5
程序存儲(chǔ)器容量： 1.5KB（1K x 12）
程序存儲(chǔ)器類型： OTP
EEPROM 大小： 16 x 8
RAM 容量： 41 x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： 0°C ~ 70°C
封裝/外殼： 8-SOIC（0.209"，5.30mm 寬）
包裝： 管件
配用： XLT08SO-1-ND - SOCKET TRANSITION 8SOIC 150/208
AC164312-ND - MODULE SKT FOR PM3 16SOIC
ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
309-1048-ND - ADAPTER 8-SOIC TO 8-DIP
309-1047-ND - ADAPTER 8-SOIC TO 8-DIP
AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC
1999 Microchip Technology Inc.
DS40139E-page 15
PIC12C5XX
4.2.2
SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral functions to control
the operation of the device (Table 4-1).
The special registers can be classified into two sets.
The special function registers associated with the
“core” functions are described in this section. Those
related to the operation of the peripheral features are
described in the section for each peripheral feature.
TABLE 4-1:
SPECIAL FUNCTION REGISTER (SFR) SUMMARY
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
Power-On
Reset
Value on
All Other
Resets(2)
N/A
TRIS
—
--11 1111
N/A
OPTION
Contains control bits to configure Timer0, Timer0/WDT
prescaler, wake-up on change, and weak pull-ups
1111 1111
00h
INDF
Uses contents of FSR to address data memory (not a physical register)
xxxx xxxx
uuuu uuuu
01h
TMR0
8-bit real-time clock/counter
xxxx xxxx
uuuu uuuu
02h(1)
PCL
Low order 8 bits of PC
1111 1111
03h
STATUS
GPWUF
—PA0
TO
PD
ZDC
C
0001 1xxx
q00q quuu
(3)
04h
FSR
(PIC12C508/
PIC12C508A/
PIC12C518)
Indirect data memory address pointer
111x xxxx
111u uuuu
04h
FSR
(PIC12C509/
PIC12C509A/
PIC12CR509A/
PIC12CE519)
Indirect data memory address pointer
110x xxxx
11uu uuuu
05h
OSCCAL
(PIC12C508/
PIC12C509)
CAL3
CAL2
CAL1
CAL0
—
0111 ----
uuuu ----
05h
OSCCAL
(PIC12C508A/
PIC12C509A/
PIC12CE518/
PIC12CE519/
PIC12CR509A)
CAL5
CAL4
CAL3
CAL2
CAL1
CAL0
—
1000 00--
uuuu uu--
06h
GPIO
(PIC12C508/
PIC12C509/
PIC12C508A/
PIC12C509A/
PIC12CR509A)
—
GP5
GP4
GP3
GP2
GP1
GP0
--xx xxxx
--uu uuuu
06h
GPIO
(PIC12CE518/
PIC12CE519)
SCL
SDA
GP5
GP4
GP3
GP2
GP1
GP0
11xx xxxx
11uu uuuu
Legend: Shaded boxes = unimplemented or unused, — = unimplemented, read as ’0’ (if applicable)
x
= unknown, u = unchanged, q = see the tables in Section 8.7 for possible values.
Note 1:
The upper byte of the Program Counter is not directly accessible. See Section 4.6
for an explanation of how to access these bits.
2:
Other (non power-up) resets include external reset through MCLR, watchdog timer and wake-up on pin change reset.
3:
If reset was due to wake-up on pin change then bit 7 = 1. All other resets will cause bit 7 = 0.
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