參數(shù)資料
型號: PIC12C672-04/P
廠商: Microchip Technology
文件頁數(shù): 46/129頁
文件大?。?/td> 0K
描述: IC MCU OTP 2KX14 A/D 8DIP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 60
系列: PIC® 12C
核心處理器: PIC
芯體尺寸: 8-位
速度: 4MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 5
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: OTP
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 8-DIP(0.300",7.62mm)
包裝: 管件
配用: ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC
1999 Microchip Technology Inc.
DS30561B-page 23
PIC12C67X
4.5
Indirect Addressing, INDF and FSR
Registers
The INDF Register is not a physical register. Address-
ing the INDF Register will cause indirect addressing.
Any instruction using the INDF register actually
accesses the register pointed to by the File Select Reg-
ister, FSR. Reading the INDF Register itself indirectly
(FSR = ’0’) will read 00h. Writing to the INDF Register
indirectly results in a no-operation (although status bits
may be affected). An effective 9-bit address is obtained
by concatenating the 8-bit FSR Register and the IRP bit
(STATUS<7>), as shown in Figure 4-4. However, IRP is
not used in the PIC12C67X.
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 4-1.
EXAMPLE 4-1:
INDIRECT ADDRESSING
movlw
0x20
;initialize pointer
movwf
FSR
;to RAM
NEXT
clrf
INDF
;clear INDF register
incf
FSR,F
;inc pointer
btfss
FSR,4
;all done?
goto
NEXT
;no clear next
CONTINUE
:
;yes continue
FIGURE 4-4:
DIRECT/INDIRECT ADDRESSING
For register file map detail see Figure 4-2.
Note 1:
The RP1 and IRP bits are reserved; always maintain these bits clear.
Data
Memory
Indirect Addressing
Direct Addressing
bank select
location select
RP1 RP0(1)
6
0
from opcode
IRP(1)
FSR register
7
0
bank select
location select
00
01
10
11
180h
1FFh
00h
7Fh
Bank 0
Bank 1
Bank 2
Bank 3
not used
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