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參數(shù)資料
| 型號(hào)： | PIC10F202T-I/OT |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 25/94頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PIC MCU FLASH 512X12 SOT23-6 |
| 產(chǎn)品培訓(xùn)模塊： | Asynchronous Stimulus 8-bit PIC® Microcontroller Portfolio |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | PIC® 10F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 4MHz |
| 外圍設(shè)備： | POR，WDT |
| 輸入/輸出數(shù)： | 3 |
| 程序存儲(chǔ)器容量： | 768B（512 x 12） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 24 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | SOT-23-6 |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 637 (CN2011-ZH PDF) |
| 配用： | AC162059-ND - HEADER INTRFC MPLAB ICD2 8/14PIN XLT06SOT-ND - SOCKET TRAN ICE 6SOT W/CABLE AC163020-ND - ADAPTER PROGRAMMER PIC10F2XX AC164321-ND - MODULE SKT 6L PM3 SOT23 |
| 其它名稱： | PIC10F202T-I/OTDKR |
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32
AT89/83EB5114
4311C–8051–02/08
Ports
The AT8xEB5114 has 2 I/O ports, port 3, and port 4.
All port3 and port4 I/O port pins on the AT8xEB5114 may be software configured to one
of four types on a bit-by-bit basis, as shown below in Table 20. These are: quasi-bidirec-
tional (standard 80C51 port outputs), push-pull, open drain, and input only. Two
configuration registers for each port select the output type for each port pin.
Table 20. Port Output Configuration setting using PxM1 and PxM2 registers (3< x < 4)
Port Types
Quasi-Bidirectional Output
Configuration
The default port output configuration for standard AT8xEB5114 I/O ports is the quasi-
bidirectional output that is common on the 80C51 and most of its derivatives. This output
type can be used as both an input and output without the need of reconfiguring the port.
This is possible because when the port outputs a logic high, it is weakly driven, allowing
an external device to pull the pin low. When the pin is pulled low, it is driven strongly and
able to sink a fairly large current. These features are somewhat similar to an open drain
output except that there are three pull-up transistors in the quasi-bidirectional output that
serve different purposes. One of these pull-ups, called the "weak" pull-up, is turned on
whenever the port latch for the pin contains a logic 1. The weak pull-up sources a very
small current that will pull the pin high if it is left floating. A second pull-up, called the
"medium" pull-up, is turned on when the port latch for the pin contains a logic 1 and the
pin itself is also at a logic 1 level. This pull-up provides the primary source current for a
quasi-bidirectional pin that is outputting a 1. If a pin that has a logic 1 on it is pulled low
by an external device, the medium pull-up turns off, and only the weak pull-up remains
on. In order to pull the pin low under these conditions, the external device has to sink
enough current to overpower the medium pull-up and take the voltage on the port pin
below its input threshold.
The third pull-up is referred to as the "strong" pull-up. This pull-up is used to speed up
low-to-high transitions on a quasi-bidirectional port pin when the port latch changes from
a logic 0 to a logic 1. When this occurs, the strong pull-up turns on for a brief time, two
CPU clocks, in order to pull the port pin high quickly. Then it turns off again.
The quasi-bidirectional port configuration is shown in Figure 11.
PxM1.(2y+1) bit
PxM1.(2y) bit
(0<y<3) Port Output Mode
0
Quasi bidirectional
0
1
Push-Pull
1
0
Input Only (High Impedance)
1
Open Drain
PxM2.(2y-7) bit
PxM2.(2y-8) bit
(4<y<7) Port Output Mode
0
Quasi bidirectional
0
1
Push-Pull
1
0
Input Only (High Impedance)
1
Open Drain
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