參數(shù)資料
型號(hào): PIC10F202-I/P
廠商: Microchip Technology
文件頁(yè)數(shù): 26/94頁(yè)
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 512X12 8DIP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 60
系列: PIC® 10F
核心處理器: PIC
芯體尺寸: 8-位
速度: 4MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 3
程序存儲(chǔ)器容量: 768B(512 x 12)
程序存儲(chǔ)器類(lèi)型: 閃存
RAM 容量: 24 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-DIP(0.300",7.62mm)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 637 (CN2011-ZH PDF)
配用: AC162059-ND - HEADER INTRFC MPLAB ICD2 8/14PIN
33
AT89/83EB5114
4311C–8051–02/08
Figure 11. Quasi-Bidirectional Output
Open Drain Output
Configuration
The open drain output configuration turns off all pull-ups and only drives the pull-down
transistor of the port driver when the port latch contains a logic 0. To be used as a logic
output, a port configured in this manner must have an external pull-up, typically a resis-
tor tied to VDD. The pull-down for this mode is the same as the quasi-bidirectional mode.
The open drain port configuration is shown in Figure 12.
Figure 12. Open Drain Output
Push-Pull Output
Configuration
The push-pull output configuration has the same pull-down structure as both the open
drain and the quasi-bidirectional output modes, but provides a continuous strong pull-up
when the port latch contains a logic 1. The push-pull mode may be used when more
source current is needed from a port output. The push-pull port configuration is shown in
2 CPU
Input
Pin
Strong
Medium
N
P
Weak
P
CLOCK DELAY
Port Latch
Data
DPU
AUXR.7
Input
Pin
N
Port latch
Data
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