參數(shù)資料
型號: PIC10F200-I/P
廠商: Microchip Technology
文件頁數(shù): 40/94頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 256X12 8DIP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 60
系列: PIC® 10F
核心處理器: PIC
芯體尺寸: 8-位
速度: 4MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 3
程序存儲器容量: 384B(256 x 12)
程序存儲器類型: 閃存
RAM 容量: 16 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-DIP(0.300",7.62mm)
包裝: 管件
產(chǎn)品目錄頁面: 637 (CN2011-ZH PDF)
配用: AC162059-ND - HEADER INTRFC MPLAB ICD2 8/14PIN
46
AT89/83EB5114
4311C–8051–02/08
Figure 19. PWMU0 Interrupt Configuration
Table 33. PWMU0 interrupt control register
W0IC - PWMU0 Interrupt Control Register (EEh)
Reset Value = 0000 0000b
Not bit addressable
7
6
5
4
3
2
1
0
W0CF
W0CF2
W0CF1
W0CF0
W0ECOF
W0ECF2
W0ECF1
W0ECF0
Bit
Number
Bit
Mnemonic Description
7
W0COF
PWMU0 Counter Overtaking Flag
Set by hardware when the counter is higher or equal to SW0F’s value. CF flags an
interrupt if bit W0ECOF is set. W0COF can be set either by hardware or software
but can only be cleared by software.
6
W0CF2
PWMU0 Module 2 Toggle flag
Set by hardware when a match occurs. Can also be set by software. Must be
cleared by software.
5
W0CF1
PWMU0 Module 1 Toggle flag
Set by hardware when a match occurs. Can also be set by software. Must be
cleared by software.
4
W0CF0
PWMU0 Module 0 Toggle flag
Set by hardware when a match occurs. Can also be set by software. Must be
cleared by software.
3
W0ECOF
PWMU0 Counter Overtaking flag
Set to Enable IT on PWMU0 Counter Overtaking Flag.
2
W0ECF2
PWMU0 Module 2 Counter flag
Set to enable IT on PWMU0 Module 2 Toggle flag.
1
W0ECF1
PWMU0 Module 1 Counter flag
Set to enable IT on PWMU0 Module 1Toggle flag.
0
W0ECF0
PWMU0 Module 0 Counter flag
Set to enable IT on PWMU0 Module 0Toggle flag.
W0
Module 2
Module 1
IE0.4
IE0.7
To Interrupt
priority decoder
EW0
EA
CF1
CF0
ECF1 ECF0
W0
CF2
W0
COF
Module 0
Overtaking
W0
ECOF ECF2
W0IC
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