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參數(shù)資料
| 型號： | PI74AVC!6820 |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | 2.5V 10-Bit Flip-Flop with Dual and 3-State Outputs |
| 中文描述： | 2.5V的10位觸發(fā)器雙拖鞋和3態(tài)輸出 |
| 文件頁數(shù)： | 2/11頁 |
| 文件大?。?/td> | 473K |
| 代理商： | PI74AVC!6820 |
PI74AVC+16820
2.5V 10-Bit Flip-Flop
w/Dual and 3-State Outputs
2
PS8446D 08/18/04
Notes:
1.
H = High Signal Level, L = Low Signal Level,
X = Irrelevant; Z = High Impedance, Qo = Output Level before the
indicated steady-state conditions were established.
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Supply voltage range, V
CC......................................
–0.5V to +4.6V
Input voltage range, V
I .............................................
–0.5V to +4.6V
Voltage range applied to any output in the
high-impedance or power-off state, V
O
(1)
........–0.5V to +4.6V
Voltage range applied to any output in the
high or low state, V
O
(1,2)
...........................–0.5V to V
CC
+0.5V
Input clamp current, I
IK
(V
I
<0).....................................–50mA
Output clamp current, I
OK
(V
O
<0)................................–50mA
Continuous output current, I
O
........................................±50mA
Continuous current through each V
CC
or GND...........±100mA
Package thermal impedance, θ
JA
(3)
: package A............64°C/W
package K............48°C/W
Storage Temperature range, T
stg
....................... –65°C to 150°C
Notes:
1. Input & output negative-voltage ratings may be exceeded if the input
and output curent rating are observed.
2. Output positive-voltage rating may be exceeded up to 4.6V maximum
if the output current rating is observed.
3. The package thermal impedance is calculated in accordance with
JESD 51.
4. Stresses greater than those listed under MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operational sections of this specification is not implied. Ex-
posure to absolute maximum rating conditions for extended
periods may affect reliability.
Truth Table
each Flip-Flop
(1)
Inputs
CLK
↑
↑
L
X
Outputs
Q
n
H
L
Qo
Z
OE
n
L
L
L
H
D
n
H
L
X
X
Pin Description
Pin Name
Description
OE
CLK
Q
n
D
n
GND
V
CC
Output Enable Input (Active LOW)
Clock Input (Active HIGH)
3-State Outputs
Data Inputs
Ground
Power
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