參數(shù)資料
型號: PI6C184SE
廠商: PERICOM SEMICONDUCTOR CORP
元件分類: 時鐘及定時
英文描述: 6C SERIES, LOW SKEW CLOCK DRIVER, 13 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
封裝: SOIC-28
文件頁數(shù): 5/7頁
文件大?。?/td> 207K
代理商: PI6C184SE
PI6C184
Precision 1-13 Clock Buffer
5
PS8320B
10/14/02
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Figure 1. Clock Waveforms
Notes:
1. Maximum rise/fall times are guaranteed at maximum specified load.
2. Minimum rise/fall times are guaranteed at minimum specified load.
3. Rise/fall times are specified with pure capacitive load as shown.
Testing is done with an additional 500
resistor in parallel.
Minimum and Maximum Expected Capacitive Loads
Design Guidelines to Reduce EMI
1. Place series resistors and CI capacitors as close as possible to the respective clock pins. Typical value
for CI is 10pF. Series resistor value can be increased to reduce EMI provided that the rise and fall time
are still within the specified values.
2. Minimize the number of “vias” of the clock traces.
3. Route clock traces over a continuous ground plane or over a continuous power plane. Avoid routing
clock traces from plane to plane (refer to rule #2).
4. Position clock signals away from signals that go to any cables or any external connectors.
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1.5V
tphl
tplh
1.5V
Input
Waveform
Output
Waveform
Output
Buffer
Test
Point
2.4
1.5
0.4
tSDKH
tSDKP
3.3V
Clocking
Interface
(TTL)
tSDKL
t
SDFALL
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SDRISE
Test Load
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