參數(shù)資料
型號(hào): PHN1011
廠商: NXP SEMICONDUCTORS
元件分類: JFETs
英文描述: TrenchMOS transistor Logic level FET
中文描述: 11 A, 25 V, 0.011 ohm, N-CHANNEL, Si, POWER, MOSFET, MS-012AA
封裝: PLATIC, SO-8
文件頁數(shù): 1/7頁
文件大?。?/td> 115K
代理商: PHN1011
Philips Semiconductors
Product specification
TrenchMOS
transistor
Logic level FET
PHN1011
FEATURES
SYMBOL
QUICK REFERENCE DATA
V
DSS
= 25 V
’Trench’ technology
Low on-state resistance
Fast switching
High thermal cycling performance
Low-profile surface mount
package
Logic level compatible
I
D
= 11 A
R
DS(ON)
11 m
(V
GS
= 10 V)
R
DS(ON)
13.5 m
(V
GS
= 5 V)
GENERAL DESCRIPTION
PINNING
SOT96-1 (SO8)
N-channel
logic
transistor in a surface mounting
plastic
package
technology. The combination of
very low on-state resistance and
low switching losses make this
device the optimum choice in high
speed computer motherboard d.c.
to d.c. converters.
enhancement
field-effect
mode
power
PIN
DESCRIPTION
level
1-3
source
using
trench
4
gate
5-8
drain
The PHN1011 is supplied in the
SOT96-1 (SO8) surface mounting
package
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DSS
V
DGR
PARAMETER
Drain-source voltage
Drain-gate voltage
CONDITIONS
T
j
= 25 C to 150C
T
j
= 25 C to 150C;
R
GS
= 20 k
-
MIN.
-
-
MAX.
25
25
UNIT
V
V
V
GS
V
GSM
Gate-source voltage (DC)
Gate-source voltage (pulse peak
value)
Drain current (t
p
10 s)
-
-
±
15
±
20
V
V
I
D
T
a
= 25 C
T
a
= 70 C
T
a
= 25 C
T
a
= 25 C
T
a
= 70 C
-
-
-
-
-
-
11
9
44
2.5
1.6
150
A
A
A
W
W
C
I
DM
P
tot
Drain current (pulse peak value)
Total power dissipation
T
j
, T
stg
Operating junction and storage
temperature
- 55
THERMAL RESISTANCES
SYMBOL PARAMETER
R
th j-a
Thermal resistance junction
to ambient
R
th j-a
Thermal resistance junction
to ambient
CONDITIONS
Surface mounted, FR4 board, t
10 sec
TYP.
-
MAX.
50
UNIT
K/W
Surface mounted, FR4 board
150
-
K/W
d
g
s
1
2
3
4
5
6
7
8
pin 1 index
June 1999
1
Rev 1.100
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